Product Documentation
Virtuoso Layout Suite SKILL Reference
Product Version IC23.1, November 2023

lxSetGenerateOptions

lxSetGenerateOptions(
[ ?pins { t | nil } ]
[ ?instances { t | nil } ]
[ ?boundary { t | nil } ]
[ ?snapBoundary { t | nil } ]
[ ?stacks { t | nil } ]
[ ?folds { t | nil } ]
[ ?posMinSep n_posMinSep ]
[ ?inBoundary { t | nil } ]
[ ?mtm { t | nil } ]
[ ?extract { t | nil } ]
[ ?virtualHierarchy { t | nil } ]
)
=> t

Description

Tells Generate All From Source or Update Components And Nets what types of objects to generate. You can call it between calls to lxGenerateStart and lxGenerateFinish or lxUpdateComponentsAndNetsStart and lxUpdateComponentsAndNetsFinish.

When used with the other lxSet* functions, this provides an alternative interface to the Generate Layout and Update Components and Nets forms. If optional arguments are not supplied the normal default values for the form fields apply.

Arguments

?pins

Generates all the pins and snaps them to the placement grid.

?instances

Generates all the instances in the schematic that do not have one of the ignore properties attached to them.

?boundary

Generates a place and route boundary based on the settings you make in lxSetBoundaryOptions and, where applicable, lxSetAreaEstimationOptions.

?snapBoundary

Generates a rectangular snap boundary that encloses the generated PR boundary.

You can generate a snap boundary only if ?boundary is set to t.

?stacks

Automatically abuts MOS transistors into chains during layout generation.

?folds

Automatically splits devices into fingers to prevent gate width from exceeding a specified size.

?posMinSep

Defines the minimum separation between instances and pins.

?inBoundary

Positions the instances and pins inside the prBoundary.

?mtm

Preserves user-defined bindings of devices between the schematic and the layout.

This option preserves user-defined one-to-one, many-to-many, many-to-one, and one-to-many device correspondence defined in the Define Device Correspondence form.

?extract

Extracts the connectivity of the design after layout generation is complete.

?virtualHierarchy

Generates virtual hierarchy for schematic symbols with no corresponding layouts.

Value Returned

t

The layout generation options were set.

nil

The layout generation options were not set.

Examples

lxGenerateStart(schId layId)
  lxSetGenerateOptions(
    ?pins t
    ?instances t
    ?boundary t
    ?snapBoundary t
    ?stacks t
    ?folds t
    ?mtm t
    ?extract t
    ?virtualHierarchy t)
lxGenerateFinish(schId layId)

Generates a layout including pins, instances, place and route and snap boundaries, chains and folds the transistors that are generated and assigns many-to-many bindings. It then runs extraction after layout generation and generates a virtual hierarchy based on the schematic.


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