Product Documentation
Virtuoso Layout Suite SKILL Reference
Product Version IC23.1, November 2023

vrtStrandRoute

vrtStrandRoute(
d_cvid
[ layers l_layers ]
[ spineLayer t_spineLayer ]
[ createSpineSettings g_createSpineSettings ]
[ routeSpineSettings g_routeSpineSettings ]
[ ?nets l_nets ]
[ ?region l_region ]
[ ?preferredLayers l_preferredLayers ]
[ ?viaCost f_viaCost ]
[ ?connectBothGates g_connectBothGates ]
[ ?preferVio2Open g_preferVio2Open ]
[ ?postFixTrim g_postFixTrim ]
[ ?postFixMinLength g_postFixMinLength ]
[ ?postFixEolKeepout g_postFixEolKeepout ]
) 
=> t / nil

Description

Runs the ART spine generator and the spine router together.

Arguments

d_cvid

Database ID of the cellview. Can be obtained using the geGetEditCellView SKILL function.

layers l_layers

A list of routing layers.

spineLayer t_spineLayer

Specifies a spine layer.

createSpineSettings g_createSpineSettings

A DPL that specifies the settings for creating spines list.

list( nil 'enable nil|t)

routeSpineSettings g_routeSpineSettings

A DPL that specifies the settings for routing pins to spines.

list( nil 'enable nil|t
              'twigSharingDist nil|value
              'maxJogLength  nil|value
              'spinePinMaxDist nil|value
     )

?nets l_nets

A list of net names to be routed. If no net is specified, it routes all the nets in the cellview.

?region l_region

A list specifying the lower-left and upper-right coordinates of the region on which the function should operate.

?preferredLayers l_preferredLayers

A list of preferred routing layers.

?viaCost f_viaCost

The cost that the routing algorithm uses when considering creating a via. If the cost is 1, each via’s cost is equivalent to that of a pathseg with the same length and track width. If set to nil, the cost is determined by the routing algorithm.

?connectBothGates g_connectBothGates

Forces nets to connect to all the pins on the same poly gate, or to allow only one connection per gate.

?preferVio2Open g_preferVio2Open

Determines whether the router should generate wires with constraint violations or instead leave them unrouted. This is for the wires that cannot be routed without violation.

?postFixTrim g_postFixTrim

Automatically adds trim shapes to routed nets to fix end-of-line (EOL) constraint violations.

?postFixMinLength g_postFixMinLength

Automatically extend routed pathseg and via shapes to satisfy various min length constraints, such as minLength, minArea, minRectArea, etcetera.

?postFixEolKeepout g_postFixEolKeepout

Determines whether or not to fix end-of-line keepout DRC violations after routing.

Value Returned

t

Spine generation and routing was successful.

nil

Spine generation and routing failed.

Examples

vrtStrandRoute( cvId list("MD" "PO" "M0" "M1" "M2" "M3") "M2" 
   list( nil 'enable t)
   list( nil 'enable nil 
    'twigSharingDist 0.72 
    'maxJogLength 1.2
    'spinePinMaxDist nil )
   ?nets list("net21" "net34")
   ?preferredLayers list("M2" "M3")
) 

Related Topics

Virtuoso Automated Placement and Routing SKILL Functions


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