Immediate Set Options (options)

Description

The immediate set options statement sets or changes various program control options. These options take effect immediately and are set while the circuit is read. For more options, see the description of individual analyses.

Note: Options that are dependent on netlist parameter values do not maintain their dependencies on those netlist parameters.

In many cases, a particular option can be controlled by either a command-line or netlist specification. In the situation where both are used, the command-line option takes priority over the setting in the netlist options statement.

Syntax

Name options parameter=value ...

Parameters

Tolerance parameters


`reltol`	`0.001`	Relative convergence criterion.
`residualtol`	`1.0`	Tolerance ratio for residual (multiplies reltol).
`vabstol`	`1.0e-6 V`	Convergence criterion for absolute voltage tolerance.
`iabstol`	`1.0e-12 A`	Convergence criterion for absolute current tolerance.
`chargeabstol`	`1.0e-21 Coul`	Charge absolute tolerance convergence criterion.

Temperature parameters


`temp`	`27 C`	Temperature.
`tnom`	`27 C`	Temperature measurement of the default component parameter.
`tempeffects`	`all`	Temperature effect selector. If tempeffect = vt, only thermal voltage varies with temperature; if tempeffect = tc, parameters that start with tc are active and thermal voltage is dependent on temperature; and if tempeffect = all, all built-in temperature models are enabled. Possible values are vt, tc and all.

Output parameters


`save`	`selected`	Defines node voltage waveforms to be saved. selected ... voltage waveforms for nodes saved by the user are created, if no node voltage is saved, then allpub is used. allpub ... all node voltages, voltage source currents, inductor currents, and iprobe currents are saved. lvlpub ... all node voltages, voltage source currents, inductor currents, and iprobe currents down `nestlvl` levels are saved. none ... no node voltage is saved except one randomly selected node voltage. nooutput ... disables any waveform writing. all ... same as allpub, additionally saves internal nodes of active devices. lvl ... same as lvlpub, additionally saves internal nodes of active devices. Possible values are all, lvl, allpub, lvlpub, selected, none and nooutput.
`saveselectedtoallpub`	`default`	Controls when save=selected is changed to save=allpub. default ... save=selected will automatically switch to save=allpub if no node voltages or currents through voltage sources/inductors are saved. nooutput ... save=selected will automatically switch to save=allpub if no waveforms saved for any output, including all current probes, device operating point parameters etc.. Possible values are default and nooutput.
`nestlvl`	`infinity`	Defines hierarchical level when save=lvl or lvlpub is used. nestlvl=1 refers to top level, nestlvl=2 includes top level and one level below, ....
`currents`	`selected`	Defines element, device, and inline subckt current waveforms to be saved. selected ... waveforms for element, device, and inline subckt currents saved by the user are created. all ... save all element, device and inline subckt currents on all hierarchy levels. nonlinear ... save currents for all nonlinear elements on all hierarchy levels. none ... no currents are saved, but individually saved currents are not disabled. Possible values are all, nonlinear, selected and none.
`subcktprobelvl`	`0`	Defines level up to which subckt terminal current waveforms are automatically saved. 0 ... no subckt currents are saved. 1 ... current through top level subckt instance terminals are saved. 2 ... current through terminals of subckt instances in the top two levels of hierarchy are saved. ....
`pwr`	`none`	Defines element, subckt, and total design power waveforms (extension :pwr, unit W) to be saved. all ... all element, subckt, and total power. subckt ... all subckt and total power. devices ... all element and total power. total ... total power. none ... no power. Possible values are all, subckts, devices, total and none.
`subcktiprobes`	`yes`	Defines whether subckt terminal currents saved are calculated by summing up branch currents, or by inserting iprobe elements. all ... uses iprobes for both, individual subckt port current save and subcktprobelvl statements (Spectre default). save ... only inserts iprobes for individual subckt port current save statements but not for subcktprobelvl statements (APS default). no ... doesn't insert any iprobe. yes ... maintains backward compatibility by using `all` for Spectre, SpectreX and `save` for APS. auto ... smart iprobe insertion, subckt ports with large numbers of branches use iprobe elements, subckt ports with small number of branches use branch current sum (SpectreX enforced behavior, use -preset_override to honor other settings but be aware of potential performance degradation). Possible values are no, save, all, yes and auto.
`useprobes`	`no`	Defines whether element current saved is taken from element or from inserted iprobe element. yes ... inserts iprobes for individual element current save, and currents statement. no ... use element current, no iprobes inserted. Possible values are no and yes.
`useterms`	`default`	Defines whether device/subckt terminal index (M1:1) or name (M1:d) is saved, when using currents or subcktprobelvl options. Doesn't apply to individual save statements, i.e. save M1:d. default ... save device terminal currents with terminal name and subckt terminal currents with terminal index. index ... save both with terminal index. name ... save both with terminal name. Possible values are default, name and index.
`usenodes`	`name`	Defines how identify last part of hier name with digital in save statement, as device/subckt terminal index first or as terminal/node name first. i.e. For save mn.4 name ... identify 4 as node/terminal name first, if no node/terminal named 4, use it as index. index ... Identify 4 as terminal index first, if no fourth terminals, identify 4 as name.. Possible values are name and index.
`savefilter`	`none`	Option defines whether global or wildcard save statements create waveforms for all nodes (none), or exclude nodes being only RC connected (rc). Option only impacts waveform creation but not reduction or node preservation inside Spectre. Possible values are none, rc and colon.
`saveports`	`no`	If set to yes, subckt ports will be saved when nodes inside subckts are saved with wildcards, i.e. "save * subckt=abc". Possible values are no and yes.
`save_time_window`	`0`	Specifies the time window for all saved waveforms. Multiple time windows are supported: save_time_window=[1u 2u 5u 6u]. If a waveform is saved with an individual time_window argument, then the save_time_window option is ignored for this signal.
`wfdebug`	`none`	Flag to store the measurement signal in a raw file. Possible values are none, measure and assert.
`mcwf`	`yes`	Flag to generate waveform in Monte Carlo simulation. Possible values are no and yes.
`saveahdlvars`	`selected`	AHDL variables to output. Possible values are all, selected and allwithnodes.
`spfprobenode`	`net_only`	When net_only, it is the only net name in SPF file that is used to match the wild card in .probe/.ic statements. The hierarchical structure of the net name is restored like pre-layout netlist. When all, the net name in SPF file is stored as pre-layout node name, and the nodes in SPF file are preserved like the current behavior. The wild card in .probe/.ic will match all the nodes and net names. Possible values are net_only and all.
`dspf_nodename`	`original`	When original, The current behavior, .connect is created for nodes cut by DSPF translator. When net_only, it is the only net name in DSPF file that is used to match the wild card in .probe/.ic statements. The hierarchical structure of the net name is restored like pre-layout netlist. When all, the net name in DSPF file is stored as pre-layout node name, and the nodes in DSPF file are preserved like the current behavior. The wild card in .probe/.ic will match all the nodes and net names. Possible values are original, net_only and all.
`redundant_currents`	`no`	Defines whether one or both currents through two terminal devices are saved when 'currents=all' or 'save *:currents' are used. The option doesn't apply to individually saved terminal currents like 'save R0:1 R0:2'. no...only one terminal current is saved, yes...both terminal currents are saved. Possible values are no and yes.
`sine_sync_period`	`no`	If set to yes, sine-type source proposes time points exactly at 0, 30, 60, 90, 120, ... degree.. Possible values are no and yes.
`pwl_ignore_error_msg`	`no`	If set to yes, will ignore pwl source error message if the time of two points are same.. Possible values are no and yes.
`disable_check_nf`	`no`	If set to yes, disable node folding checking.. Possible values are no and yes.
`disable_selfheating`	`no`	If set to yes, disable self-heating flow in the bsimsoi, hisim_hv, bht, bht0, vbic, ucsd_hbt, hbt, bsimbulk, psp103, hisimsoi, r3, hvmos, bsimcmg, bsimimg, jfet100, utsoi2, asm_gan, mvsg_gan and lutsoi models.. Possible values are no and yes.
`wb_need_propose_time`	`no`	If set to yes, enable wave buffer propose time.. Possible values are no and yes.
`strict_td`	`yes`	strict delay or not.. Possible values are no and yes.
`wb_reltol`	`0.001 no`	signal compress reltol in wavebuffer..
`wb_vabstol`	`1e-6 no`	signal compress vabstol in wavebuffer..
`wb_iabstol`	`1e-12 no`	signal compress iabstol in wavebuffer..
`b4_tunneling_current_max_exp`	`34 no`	max exp value for b4 tunneling current..
`vcr_need_reject_time`	`no`	If set to yes, enable vcr reject time.. Possible values are no and yes.
`skip_bjt_limit`	`no`	If set to yes, skip bjt limit.. Possible values are no and yes.
`clamp_bjt_cap`	`no`	if set to yes, clamp bjt negative cap.. Possible values are no and yes.
`skip_bsim4_limit`	`no`	If set to yes, skip bsim4 limit.. Possible values are no and yes.
`src_allbrkpts`	`no`	If set to yes, set all user-defined points for a pwl-type source as breakpoints in transient analysis. When both the global option and the 'allbrkpts' option of individual sources are set,the latter take precedence.. Possible values are no and yes.
`ahdldomainerror`	`warning`	AHDL domain error handling selector. If ahdldomainerror=error, incorrect AHDL domain input is treated as an error; If ahdldomainerror=warning, incorrect AHDL domain input is treated as warning; If ahdldomainerror=none, AHDL domain error is ignored. Possible values are error, warning, none, erroriter and warniter.
`rawfmt`	`psfxl`	Output raw data file format. Possible values are nutbin, nutascii, psfbin, psfascii, psfbinf, psfxl, dsfmwo, sst2, fsdb, fsdb5, wdf, uwi, tr0ascii and vwdb.
`rawfile`	`%C:r.raw`	Output raw data file name.
`precision`	`%g`	Format specification of double for psfascii. Example: "%15.12g" outputs 12 decimal digits in mantissa. The default value "%g" prints 6 decimal digits.
`psfversion`		Version of psfxl format to use. Default is "1.1"..
`fsdbversion`		Version of fsdb format to use. Default is "6.3" Valid versions are 5.7, 5.8, 6.1, or 6.3.
`uwifmt`		User-defined output format. To specify multiple formats, use `:` as a delimiter. The option is valid only when waveform format is defined as uwi.
`uwilib`		Absolute path to the user-defined output format library. This option is used along with `uwifmt`. Use `:` as a delimiter to specify more than one library.
`exportfile`		oceanEval output file name.
`wfmaxsize`	`infinity`	Limits the maximum size of the output waveform. This option is valid when uwi format is set.
`disk_check_thresh`	`1E8`	The threshold of disk space check.
`disk_check_autoresume`	`no`	Automatically resume the simulation once the available disk space is larger than the specified threshold. Possible values are no and yes.
`disk_check_user_quota_cmd`		A command to query the disk quota for a user. While checking the disk space available for a run, Spectre considers both the available disk space and the user disk quota returned by the command specified by this option. This command result should be in YAML format containing keyword 'available: <available user disk quota>' to indicate available user disk quota. The supported disk storage unit are G, g, Gb and GB. If no specified disk storage unit is used, the default disk storage unit will be byte..
`gennetlistdir`	`no`	Output netlist directory in logfile. Possible values are no and yes.
`procopt`	`no`	Fix affinity for the simulation run. Possible values are no and yes.

Convergence parameters


`homotopy`	`all`	Method used when there is no convergence on initial attempt of DC analysis. You can specify methods and their orders by defining vector setting such as homotopy=[source ptran gmin]. Possible values are none, gmin, source, dptran, ptran and all.
`newton`	`normal`	Method used on DC analysis. You can specify methods newton=[none\|normal].. Possible values are none and normal.
`noiseon_type`	`all`	The noiseon_type defines the noise sources which are enabled by the noiseon/off_inst option.. Possible values are thermal, flicker, shot, ign and all.
`noiseoff_type`	`all`	The noiseoff_type defines the noise sources which are disabled by the noiseon/off_inst option.. Possible values are thermal, flicker, shot, ign and all.
`limit`	`dev`	Limiting algorithms to aid DC convergence. Possible values are delta, log, dev, l2, newton and none.
`device_limit`	`dev`	Limiting method for nonlinear device to aid DC convergence. Possible values are dev, delta and dev_delta.
`maxdeltav`	`0.3 V`	Maximum change in voltage allowed per Newton iteration when limit=delta (default 0.3 V) or limit=l2 (default 10 V).
`automaxdeltavscale`	`0.1`	Scale for maxdeltav calculation when maxdeltav is set automatically, must be larger than 0 and less than 1.
`maxvdddc`	`3.0 V`	Maximum value of Vdd for DC simulation.
`maxvdd`	`0 V`	MaxVdd set from user, used for some optimization check in APS.
`maxphysicalv`	`infinity V`	Maximum physical voltage allowed in solution.
`maxphysicali`	`infinity A`	Maximum physical current allowed in solution.
`maxphysicalmmf`	`infinity A`	Maximum physical magnetomotive force allowed in solution.
`maxphysicalflux`	`infinity Wb`	Maximum physical flux allowed in solution.
`maxphysicalunitless`	`infinity`	Maximum physical unitless signals allowed in solution.
`ahdl_device_limit`	`dev`	Limiting method for AHDL device to aid DC convergence. Possible values are dev, delta and dev_delta.
`ahdl_maxdeltav`	`0.3 V`	Maximum change in voltage allowed for AHDL devices per Newton iteration when ahdl_device_limit=delta (default 0.3 V).
`gmethod`	`dev`	Stamp gdev, gnode, or both in the homotopy methods (other than dptran). See the detailed description below the parameter descriptions for more information. Possible values are dev, node and both.
`dptran_gmethod`	`node`	Stamp gdev, gnode, or both in the dptran (homotopy) methods. Possible values are dev, node and both.
`gmin_start`	`1.0`	Initial gmin in gmin-stepping (homotopy) methods.
`gmin_converge`	`1.0e-13`	Maximum DC gmin value allow DC to converge.
`try_fast_op`	`yes`	Speed up the DC solution. For hard-to-converge designs, this feature fails and other methods are applied. In corner cases, this feature may have negative effects. If the DC analysis is unusually slow, the memory usage of the processes keeps increasing, or if DC analysis gets stuck even before homotopy methods start, set this option to no. Possible values are no and yes.
`icversion`	`1`	Convert initial condition to initial guess, when .ic statements exist in the netlist and there are no other options to set IC or nodeset.
`dcmaxiters`	`5`	Maximum number of Newton iterations in DC simulation.
`dcminiters`	`2`	Minimum number of Newton iterations in DC simulation.
`stackfet_dcmaxiters`	`100`	Maximum number of Newton iterations in DC simulation for StackFET.
`dc_diagnose_time`	`1800`	Time interval for printing out diagnose information in DC simulation.
`dc_diagnose_elements`	`10`	Number of elements connected to non-converge nodes in printing diagnose information in DC simulation.
`ptranmaxsteps`	`200`	Maximum number of steps for ptran phase in DC simulation.
`dptranmaxsteps`	`300`	Maximum number of steps for dptran in DC simulation.
`ptranmaxsteps1`	`500`	Maximum number of steps for ptran phase in 1st-stage DC simulation.
`dptranmaxsteps1`	`500`	Maximum number of steps for dptran phase in 1st-stage DC simulation.
`dcoptmaxsteps`	`300`	Maximum number of steps for dcopt in DC simulation.
`dcoptautoptransteps`	`100`	Initial number of steps for ptran phase in DC simulation with dcoptmaxsteps=auto.
`dcoptautodptransteps`	`100`	Initial number of steps for dptran phase in DC simulation with dcoptmaxsteps=auto.
`dcoptic`	`aps1`	Initial condition for dcopt in DC simulation. Possible values are no, aps1, aps2 and xps.
`dcoptictype`	`nodeset`	Initial condition type for dcopt in DC simulation. Possible values are nodeset and ic.
`reusedc`	`no`	Reuse dcopt results from second analysis. Possible values are no, dcopt and previc.
`icpriority`	`netlist`	Set the ic priority order. If set to netlist, the order from lowest to highest is readNS, netlist NS, readIC, netlist IC. If set to file, the order from lowest to highest is netlist NS, readNS, netlist IC readIC. Possible values are file and netlist.
`subcktoppoint`	`no`	Generate operating point parameters for sub-circuit instances. Possible values are no and yes.
`out_dev_stack`		Dump expanded stacked device macro netlisting a separate file, Dump complete DC OP output in a separate file.
`fastmcmethod`		Enable sss standalone running.
`detect_path_vpn`	`[...]`	Define vpn nodes for detecting path.
`detect_path_vgnd`	`[...]`	Define vgnd nodes for detecting path.
`detect_path_clock`	`[...]`	Define clock for detecting path.
`detect_path_config`		Define extra options for detecting path in tcl file.
`subcktcap`	`0`	Select the sub-circuit capacitance output mode. If this is set to 0 then the sum of the four capacitances is 0, e.g. cgg + cgs + cgd + cgb = 0; If set to 1, the diagonal capacitance is equal to the sum of off-diagonal capacitances, e.g. cgg = cgs + cgd + cgb.
`subcktopfreq`	`0.159155 Hz`	This parameter is used to set the frequency used in AC analyses run as part of sub-circuit operating point parameter calculations. The default value is 1/(2*pi) Hz.

Multithreading parameters


`multithread`	`off`	Enable or disable multithreading capability. When multithreading is enabled but the number of threads (nThreads) is not specified, Spectre will automatically detect the number of processors and select the proper number of threads to use. (See important note about using multithreading in the detailed description below the parameter descriptions). Possible values are off and on.
`forcemt`	`no`	Force the multithread behaviour, no is to choose number of threads automatically according to circuit size, yes is to use the number of threads specified by user strictly, exit is when number of threads specified more than needed according to circuit size. Defualt is no.. Possible values are no, yes and exit.
`nthreads`	`1`	Specifies the number of threads for multithreading.

Component parameters


`rabsshort`	`0` Ω	When this option is set, all fixed value resistors with absolute value of R<=rabsshort are shorted. Default value is 0 for Spectre, and 1m for APS. Rabsshort can additionally be applied to variable resistors using the option 'short_cut_var_elem=yes'.
`rabsclamp`	`0.0` Ω	All fixed value and variable resistors with absolute value of R<=rabsclamp are clamped to 'rabsclamp'.
`rcut`	`infinity` Ω	The value of fixed value resistors with R>rcut is limited to 'rcut' value. Default is infinity for Spectre and MAX(1/GMIN, 1e12) for Spectre APS and SpectreX. For bsource resistor, default is 1e12 for Spectre and MAX(1/GMIN, 1e12) for Spectre APS and SpectreX. If GMIN is not specified, the value of MAX(1/GMIN, 1e12) is 1e12. rcut can additionally be applied to variable resistors using the option 'short_cut_var_elem=yes'.
`rcut_bsource`	`1e12` Ω	When rcut_bsource=value is given, all instance bsource resistors with R>value are clamped to value. It has high priority than rcut if both are set. Default is 1e12 Ohm for bsource resistor.
`rclamp_bsource`	`1` Ω	When rclamp_bsource=value is given, all instance bsource resistors with R<value are clamped to value. It has high priority than rclamp if both are set. Default is 0.001 Ohm for bsource resistor.
`rclamp_bsource_mfactor`	`ignore`	Defines whether the rclamp_bsource clamping value is scaled with the M-factor (scaled) or not (ignored). Possible values are scaled and ignore.
`rthresh`	`0.001` Ω	All instance resistors with abs(R) < rthresh will use resistance form, unless their instance parameter or model parameter overwrites it.
`cclamp`	`0.0 F`	All capacitors including bsource capacitors with C<=cclamp are clamped to 'cclamp'.
`ccut`	`-infinity F`	Capacitors with C<=ccut are replaced by open. ccut can additionally be applied to variable capacitors using the option 'short_cut_var_elem=yes'.
`cgnd`	`-infinity F`	Coupling capacitors with C<=cgnd are split into 2 grounded capacitors with same C value.
`cmax`	`infinity F`	All capacitors with C>=cmax are clamped to 'cmax'.
`kcut`	`0.0`	Fixed value mutual inductors with absolute value of K<=kcut are replaced by an open. kcut can additionally be applied to variable value mutual inductors using the option 'short_cut_var_elem=yes'. Default value is 0 in Spectre, and 1m in APS.
`lshort`	`0 H`	Fixed value inductors with L<=lshort are shorted. lshort can additionally be applied to variable value inductors using the option 'short_cut_var_elem=yes'.
`dcut`	`[...]`	Replaces all diode instances using the specified model definitions with an open. dcut=all cuts all diode elements.
`qcut`	`[...]`	Replaces all BJT instances using the specified model definitions with an open. qcut=all cuts all BJT elements.
`vabsshort`	`0.0 V`	Voltage sources with absolute DC voltage less than or equal to vabsshort are shorted. Spectre by default isn't shorting any voltage source, Spectre APS uses a default value of 1e-9 V.
`scalem`	`1.0`	Model scaling factor.
`scale`	`1.0`	Device instance scaling factor.
`scalefactor`	`1.0`	ScaleFactor for Device Model Technology Scaling. The options parameter scalefactor enables device model providers to scale device technology independent of the design dimension scaling done by circuit designers. The resulting device instance scaling is defined by 'scale * scalefactor'. If the foundry uses a technology scale factor of 0.9 (scalefactor=0.9), and the circuit designer uses a design scale factor of 1e-6 (scale=1e-6), then the compounded scaling of the device instance dimension is 0.9e-6. Unlike options parameter scale, scalefactor cannot be used as a netlist parameter and cannot be altered or used in sweep statements.
`ishrink`	`1.0`	Ishrink factor.
`compatible`	`spectre`	Encourage device equations to be compatible with a foreign simulator. This option does not affect input syntax. Possible values are spectre, spice2, spice3, cdsspice, hspice, spiceplus, eldo, sspice, mica, tispice and pspice.
`diode_jtun_current`	`hspice`	the flag to enable or disable the jtun current backward to hspice. Possible values are spectre and hspice.
`approx`	`no`	Use approximate models. Difference between approximate and exact models is generally less public. Possible values are no and yes.
`auto_minductor`	`no`	Automatic insertion of missing mutual inductor coupling. For more information, see detailed description below the parameter descriptions. Possible values are no and yes.
`kmax`	`no`	Sets 1.0 as the maximum absolute value for coupling co-efficient of mutual inductors. Possible values are no and yes.
`nport_bbspice_to_linear`	`yes`	When set to yes, if BBSpice fails or generates large fitting errors, automatically switch nport `interp option from bbspice to linear. This auto-switching depends on analysis when BBSpice generates large fitting errors. If set to no, disable this feature. Possible values are no and yes.`
`nport_default_interp`	`auto_switch`	If 'nport_default_interp' is set to 'auto_switch', 'nport' automatically chooses 'bbspice' for analyses, such as 'pss' and the 'tstab' interval of 'hb' and 'pss', and chooses 'linear' for analyses, such as 'ac', 'dc', 'tran', and 'sp'. For all nport elements in the netlist that do not have 'interp' set, their 'interp' option will be set to the value specified in the global option 'nport_default_interp'. If an 'nport' instance has the 'interp' option explicitly specified, the instance 'nport' option will take priority over the global option. Possible values are spline, rational, linear, bbspice, mvf and auto_switch.
`nport_default_passivity`	`disable`	Check and enforce passivity of S-parameter for all nport instances. Default is `disable, which means this global option has no effect. If set to a value other than disable, all nport elements in the netlist without a value for passivity explicitly set, will have their passivity argument set to the same value as specified in this global option. If an nport instance already has the passivity option specified, the instance option will take priority if both are present. Possible values are no, check, enforce, fit_weak_enforce, fit_enforce and disable.`
`nportbbsfittedfiledir`		The directory to which the BBSpice fitted S-Parameter file will be put. If it is not specified, the file will be in directory named as 'BBSpiceOutput'. If a relative path is specified, the path is relative to the current working directory.
`nportirreuse`	`yes`	Reuse impulse responses data for all nport instances. If no, disable this feature. Possible values are no and yes.
`nportwaitbbsv2`	`no`	If set to yes, bbspice ver. 2 will wait if another process is running bbspice ver. 2 on the same s-parameter file. Only work with nportbbsversion=2. Possible values are no and yes.
`nportirfiledir`		The directory to which the nport impulse response file will be written. If it is not specified, the file will be written to /home/<username>/.cadence/mmsim/. If a relative path is specified, the path is relative to the current working directory.
`nportcompress`	`yes`	Nport compression improves the efficiency of S-parameter simulation of large nport files when a certain percentage of the ports is unused, i.e., open or short circuited. Nport compression does not impact simulation accuracy. This option turns off compression if set to no and attempts to force compression if set to yes. If left unspecified, compression is on if N>=10 and the ratio of used ports is less than or equal to 0.8.. Possible values are no and yes.
`nportunusedportgmin`	`0.0`	Default is 0, which leaves the port open-circuited. A small value loads open-circuited ports with a finite but large resistance. This introduces a small error in the response, but it induces losses which help obtain a passive response.
`nportunusedportrmin`	`0.0`	Default is 0, which leaves the port short-circuited. A small value will insert a small resistance in place of short circuited ports. This introduces a small error in the response, but it induces losses which help obtain a passive response.
`nportcompressfiledir`		The directory where the compressed nport S-parameter file is written to. If unspecified, it is stored in outdir.
`nportbbsmaxwaittime`	`0.5`	The maximum waiting time of Spectre if another run locks BBSpice fitting on the same S-parameter file, in unit of hour. Once waiting time reaches the specified value, Spectre exits with error.
`hb_lowmem_default_mode`	`0`	Default lowmem mode for harmonic balance and following small signal analysis. If '0' is set, the low memory mode is turned off in default. If '1' is set, the standard low memory mode is turned on in default. If 'lowmem' option is explicitly specified in HB or following small signall analysis, the analysis option will take priority over this global option.

Noise parameters


`noiseon_inst`	`[...]`	The list of instances to be considered as noisy throughout noise analysis, which include, noise, sp noise, pnoise and tran noise.
`noiseoff_inst`	`[...]`	The list of instances not to be considered as noisy throughout noise analyses, which include noise, sp noise, pnoise and tran noise.

Error-checking parameters


`topcheck`	`full`	Check circuit topology for errors. Possible values are no, min, full, fixall, errmin and errfull.
`iccheck`	`all`	Check if nodes with initial conditions have capacitive path to ground or connected to ground by vsource. IC for such node is treated as nodeset. Possible values are no, vsource, cap and all.
`iccap`	`0 F`	iccap (capacitance) is added to each IC node to prevent discontinuity between OP point and time t=0 in transient analysis.
`ignshorts`	`no`	Silently ignore shorted components. Possible values are no and yes.
`diagnose`	`no`	Print additional information that might help diagnose accuracy and convergence problems. Possible values are no, yes and detailed.
`diagnose_start`	`0 s`	Start time to enable the detailed diagnosis mode.
`diagnose_end`	`(s)`	End time to enable the detailed diagnosis mode. Default is transient stop time.
`threshold_start`	`1`	Start Gdev to enable the DC detailed diagnosis mode.
`threshold_end`	`0`	End Gdev to enable the DC detailed diagnosis mode.
`debugstepdrop`	`no`	Generates warnings on dramatic step size drop and notices when step size is recovered. Possible values are no and yes.
`stepdropsize`	`100`	The threshold size of step drop to report a dramatic change warning.
`checklimitfile`		File to which assert violations are written public.
`dochecklimit`	`yes`	Check asserts in the netlist. Possible values are no and yes.
`sfx_assert`	`no`	Check asserts in the netlist for FX mode. Possible values are no and yes.
`asserts_silent_init`	`[...]`	Array of asserts or assert groups which don't generate message during initializing.
`checklimitdest`	`sqldb`	Destination(s) where violations are written. Possible values are file, psf, sqldb and both.
`checklimitdetails`	`no`	Print detailed information of expression. Possible values are no and yes.
`checklimit_full_duration`	`no`	If set to yes, assert violation includes the duration for which the violation takes place, and uses interpolation when the value exceeds the max/min bound value. Possible values are no and yes.
`mod_assert_expand_sub`	`no`	If expanding a mod name fails in an assert statement, try to expand the name as a subckt name. Possible values are no and yes.
`probe_compatible`	`spectre`	Flag to enable or disable optimization for probe wildcard statement. Possible values are hspice and spectre.
`rampsource`	`yes`	When performing dc hysteresis sweep, rampsource should be set to no. Possible values are no and yes.
`devcheck_stat`	`none`	Enable or disable output device-checking statistics. If set to none, no statistics related to asserts will be written to either screen or logfile. If set to sub, it reports the number of asserts per subckt per assert, which are enabled. If set to inst, it reports full instance name of an assert, which is enabled. It is not recommended when there are many asserts. Possible values are none, inst and sub.
`opptcheck`	`yes`	Check operating point parameters against soft limits. Possible values are no and yes.

Resistance parameters


`gmin`	`1e-12 S`	gmin (conductance) is added to each nonlinear branch of the device to prevent simulation non-convergence. Large gmin impacts accuracy of current probe, small gmin may cause circuit convergence issue. For circuit that is sensitive to leakage current, it is recommended to set gmin to a small value or zero.
`gmindc`	`1e-12 S`	Minimum conductance across each non-linear device in DC analysis. If gmindc is not specified, the value of gmindc will be equal to gmin..
`gminfloat`	`1e-12 S`	Minimum conductance added between the floating node and the ground node. If gminfloat is not specified, then the gmin value is used.
`gminfloatdc`	`1e-12 S`	Minimum conductance added between the DC floating node and the ground node in DC analysis. If gminfloatdc is not specified, then its value will be equal to gminfloat.
`gminfloathb`	`1e-9 S`	Extra conductance-like effect added between the floating node and the ground node in HB analysis, affecting only DC frequency..
`dcopttol`	`1e-8 S`	Tolerance used for dcopt DC analysis..
`fix_zero_diagonal`	`no`	Fix matrix zero diagonal issue in simulation. Possible values are no and yes.
`gshunt`	`0.0 S`	Minimum conductance added for all nodes in tran analysis.
`gshuntdc`	`0.0 S`	Minimum conductance added for all nodes in dc analysis.
`gmindcmax`	`0 S`	The maximum value that gmindc can be increased to during the automatically increasing gmindc method for convergence. The default value is gmindc.
`dcdampsol`	`no`	Damp DC solution during Newton iteration to assist convergence.. Possible values are no and yes.
`dcfloatnodecheck`	`no`	Relax DC floating node residue check in DC simulation to assist convergence.. Possible values are no and yes.
`dcuseprevic`	`no`	DC use previous analysis OP point as nodeset for the current DC analysis. Possible values are no and yes.
`dcoptfilter`	`yes`	Filter first-stage DC solution in DCOPT process.. Possible values are no and yes.
`dcoptfiltervtol`	`0 V`	The voltage tolerance for first-stage DC solution filtering in DCOPT process.
`dc_auto_rforce`	`no`	Automatically adjust the rforce value in DC simulation to get accurate IC setting.. Possible values are no and yes.
`ignore_blowup`	`no`	Ignore signal blowup in simulation.. Possible values are no and yes.
`dc_ic_abstol`	`1.0e-6`	IC absolute toleration for DC IC accuracy check..
`dc_ic_reltol`	`0.001`	IC relative toleration for DC IC accuracy check..
`dccheck`	`no`	DC solution physical check. If set to yes, DC will be rerun with limit=delta if the solution obtained by the first run is not physical. If set to detail, the solution differences between the two runs will be printed out in the log file.. Possible values are no, yes and detail.
`dc_check_multiple_solutions`	`no`	Check for DC multiple solutions.. Possible values are no and yes.
`dc_solution_vabstol`	`1.0e-3`	DC solution voltage absolute toleration for multiple solution check..
`dc_solution_vreltol`	`0.1`	DC solution voltage relative toleration for multiple solution check..
`dc_solution_iabstol`	`1.0e-6`	DC solution current absolute toleration for multiple solution check..
`dc_solution_ireltol`	`0.1`	DC solution current relative toleration for multiple solution check..
`gmin_check`	`max_v_only`	Specifies that effect of `gmin` should be reported if significant. Possible values are no, max_v_only, max_only and all.
`fix_singular_matrix`	`no`	Fix matrix singular issue by inserting gmin. Possible values are no, yes, print and both.
`rforce`	`1` Ω	Resistance used when forcing nodesets and node-based initial conditions.
`va_gclamp`	`1 no`	When va_gclamp=value is given, va g with g<value are clamped to value. Default is 0.0..
`ahdl_exp_limit`	`1 no`	When set to a positive value, ahdl exp() function will use it to limit exp() function arguments.

Quantity parameters


`value`	`V`	Default value quantity.
`flow`	`I`	Default flow quantity.
`quantities`	`no`	Print quantities. If quantities=min, the simulator prints out all defined quantities; if quantities=full, the simulator also prints a list of nodes and their quantities. Possible values are no, min and full.

Annotation parameters


`audit`	`detailed`	Print time required by various parts of the simulator. Possible values are no, brief, detailed and full.
`inventory`	`detailed`	Print summary of components used. Possible values are no, brief, detailed and full.
`narrate`	`yes`	Narrate the simulation. Possible values are no, yes and compact.
`debug`	`no`	Give debugging messages. Possible values are no and yes.
`info`	`yes`	Give informational messages. Possible values are no and yes.
`note`	`yes`	Give notice messages. Possible values are no and yes.
`maxnotes`	`5`	Maximum number of times a notice is issued per analysis. Note that this option has no effect on notices issued as part of parsing the netlist. Use the -maxnotes command-line option to control the number of all notices issued.
`stver_note`	`no`	Give -stver suggestion warning for invalid parameter. Possible values are no and yes.
`warn`	`yes`	Display warning messages. Possible values are no and yes.
`maxwarns`	`5`	Maximum number of times a warning message is issued per analysis. Note that this option has no effect on warnings issued as part of parsing the netlist. Use the -maxwarns command-line option to control the number of all warnings issued.
`maxwarnstologfile`	`5`	Maximum number of times a warning message is printed to the log file per analysis. Note that this option has no effect on warnings printed as part of parsing the netlist. Use the -maxwarnstolog command-line option to control the number of all warnings printed to the log file.
`maxnotestologfile`	`5`	Maximum number of times a notice message is printed to the log file per analysis. Note that this option has no effect on notices printed as part of parsing the netlist. Use the -maxnotestolog command-line option to control the number of all notices printed to the log file.
`error`	`yes`	Generate error messages. Possible values are no and yes.
`digits`	`5`	Number of digits used when printing numbers.
`measdgt`	`0`	Number of decimal digits (in floating point numbers) in measurement output in mt0 format.
`notation`	`eng`	The notation to be used to display real numbers to the screen. Possible values are eng, sci and float.
`cols`	`80`	Width of screen in characters.
`colslog`	`80`	Width of log-file in characters.
`title`		Circuit title.
`simstat`	`basic`	Print simulation phase statistics report. Possible values are basic and detailed.

Matrix parameters


`pivotdc`	`no`	Use numeric pivoting on every iteration of DC analysis. Possible values are no and yes.
`dc_pivot_check`	`no`	During DC analysis, the numeric pivoting is only performed when bad pivot is detected. Possible values are no and yes.
`tran_pivot_check`	`no`	During Tran analysis, perform numerical pivoting when bad pivot is detected. Possible values are no and yes.
`tran_pivot_threshold`	`0.00001`	When tran_pivot_check=yes, the relative pivot threshold below which the matrix will be reordered..
`checklimit_skip_subs`	`[...]`	Array of subcircuit masters or subcircuit master patterns to be skipped in device checking. Patterns can have any wildcard symbols.
`checklimit_skip_file`		File which contains the subcircuit masters or subcircuit master patterns to be skipped in device checking. Patterns can have any wildcard symbols.
`checklimit_skip_insts`	`[...]`	Array of instances to be skipped in device checking. Instances can have any wildcard symbols.
`checklimit_skip_insts_file`		File which contains the instances to be skipped in device checking. Instances can have any wildcard symbols.
`checklimit_skip_ie_connect_devices`	`0`	The devices connected to AMS IE elements (hierarchy level must be lesser than the value specified for this option) will be skipped in device checking.
`pivrel`	`0.001`	Relative pivot threshold.
`pivabs`	`0`	Absolute pivot threshold.
`complexpivrel`	`1e-5`	Relative pivot threshold for small signal analyses.
`preorder`	`partial`	Try this option when simulation runs out of memory or if the simulation is unreasonably slow for the size of your design. It controls the amount of matrix pre-ordering that is done and may lead to much fewer matrix fill-ins in some cases. Known cases include designs with very large number of small resistors and large number of behavioral instances containing voltage based equations. Possible values are partial, full and limited.
`limit_diag_pivot`	`yes`	If set to yes, there is a limit on the number of matrix fill-ins when selecting a pivot from a diagonal. For backward compatibility, set this option to no. Possible values are no and yes.
`rebuild_matrix`	`no`	If set to yes, rebuild circuit matrix at the beginning of ac, dc, dcmatch, montecarlo, pz, stb, sweep, tdr, and tran analyses. This is to ensure consistent matrix ordering at the beginning of the analyses for consistent results. Notice that rebuild circuit matrix can result in performance overhead. Possible values are no and yes.

Fault analysis parameters


`faultmerge`	`yes`	If no, generate a separate fault for each instance that has an optimized parallel connectivity and iterated instances that have '< number [ : number ] >' in their name. If yes, reduce the number of defects by taking into account merged terminals for iterated and parallel devices. This parameter is applicable in the +aps and +preset flows only. Possible values are no and yes.
`faultcustompreserve`	`[...]`	Preserve all the specified masters for custom fault generation and simulation.
`faultmacro`	`no`	If yes, generates the requested faults only at the boundary of the subcircuits specified by the mosmacro option and skip all instances below those subcircuit levels. If no, generate the faults at all levels in the specified subcircuits. Possible values are no and yes.

Sensitivity parameters


`sensfile`		Output sensitivity data file name.
`sensformat`	`tabular`	Format of sensitivity data. Possible values are tabular and list.
`senstype`	`partial`	Type of sensitivity being calculated. Possible values are partial and normalized.
`sensfileonly`	`no`	Enable or disable raw output of sensitivity. results. Possible values are no and yes.
`sensbinparam`	`no`	Sensitivity for binning models. Possible values are no, uncorrelated and correlated.
`paramrangefile`		Parameter range file.

Performance parameters


`minr`	`0.0`	All parasitic resistors inside devices less than global minr will be removed. The order of checking devices is the follows: 1. Check if resistors are smaller than local minr. If yes, check if it is a MOSFET or BJT. If it is a MOSFET, drop the resistor, if it is BJT, clamp to the minr value, and give a warning message for both cases. 2. Check global minr, All Parasitic resistors less than global minr are removed and a warning message is issued. 3. If the resistor is not removed and is smaller than 0.001, issue a warning.
`short_bjtr`	`0.0`	All parasitic resistors inside bipolar devices less than global short_bjtr will be removed. This option is applied to all bipolar junction transistors.
`cscalefactor`	`1e-3`	Scaling factor for very large capacitor.
`cthresh`	`1e38`	Large capacitors can cause transient convergence problems, especially as the time-step shrinks. This is similar to the issues that small resistors cause. There is an alternative exact representation of a capacitor, which does not suffer from this problem, but can introduce an equation to be solved. If a capacitance is greater than cthresh, then the alternative formulation is used. Accuracy is not impacted by the change.
`highvoltage`	`no`	Enable optimized Spectre settings for high voltage designs including voltage, and current binning, excluding VerilogA and dangling nodes from convergence checks, and optimized large capacitance handling. Possible values are no and yes.
`vrefgnd`		Specify reference ground.
`macro_mode`		Specify macro_mode configuration.
`verilogalang`	`relax`	AHDL Verilog-A language syntax check mode selector. If verilogalang=strict, show archaic syntax input as an error during Verilog-A parsing; If verilogalang=relax, show archaic syntax input as a warning during Verilog-A parsing. Possible values are strict and relax.
`minstepversion`	`1`	Minstep algorithm flow control. If minstepversion=0, desperate big jump is taken when minstep is reached. If minstepversion=1, a forward/backward search algorithm is taken to find a converged solution at small step size. By default, minstepversion=1.
`max_minstep_nonconv`	`200`	The maximum number of convergence failures allowed below minstep within 5% of stop time.
`max_approach_minstep`	`300`	The maximum number of times allowed to approach minstep within 5% of stop time.
`max_consecutive_minstep`	`1000`	The maximum number of consecutive steps allowed to be less than 10*minstep.
`discontinuity`	`no`	Detect device discontinuity and enable robust transient simulation. Possible values are no and robust.
`autostop`	`no`	If yes, tran analysis is terminated when all event-type measurement expressions have been evaluated. Event-type expressions use thresholding, event, or delay type functions. If the value is spice, autostop is consistent with spice simulator. Possible values are no, yes and spice.
`large_newton_reject`	`1`	Reject Newton iteration when large residue or delta solution occurs during transient analysis.

Model parameters


`soft_bin`	`singlemodels`	If set to singlemodels, it is used only on non-binned models. Possible values are singlemodels, no and allmodels.
`xpssdc_disable_output`	`1`	When set to 1, disable waveform output for xpssdc child process.
`filter_wildcard_colon_ic`	`0`	When set to 1, ignore colon node in ic wildcard expansion.
`filter_wildcard_terminal_ic`	`0`	When set to 1, ignore terminal in ic wildcard expansion.
`postlpreset`	`...`	Enables local net based postlayout optimization. Common application is to disable postlayout optimization for differential signals in comparators and other sensitive circuits. Example: opt1 options postlpreset=off postlnets=[I1.in1 I1.in2]. Wildcard is supported for the net name (I1.*). Default takes the value from the +postlpreset command line option.. Possible values are off, cx, ax, mx, lx and vx.
`rcr_net_vpn`		The virtual power node names, globally.
`rcr_net_vpn_groups`		The virtual power node groups, globally.
`protect_sub`		The subckt names specified in the vector and its descendant subckts will be preserved.
`protect_inst`		The inst names specified in the vector and its descendant insts will be preserved.
`rcr_net_node_auto_res_bump`		The auto res_bump value specified on the value.
`rcr_net_node_fmax`		The fmax specified will be applied to the RCR engine of the RC network which contains the node.
`rcr_net_preserve_pn_ports`	`0`	When set to 1, preserves ports of parasitic networks that are connected to a DC vsource.
`rcr_net_preserve_ground_reg_ports`	`0`	When set to 1, preserves ports of parasitic networks that are connected to a ground regular type.
`rcr_net_preserve_vpn_ports`	`0`	When set to 1, preserves ports of parasitic networks that are connected to a VPN source.
`rcr_net_preserve_active_word_line_ports`	`0`	When set to 1, preserves ports of parasitic networks that are connected to an active word-line node.
`rcr_net_preserve_idle_word_line_ports`	`0`	When set to 1, preserves ports of parasitic networks that are connected to an idle word-line node.
`rcr_net_preserve_active_bit_line_ports`	`0`	When set to 1, preserves ports of parasitic networks that are connected to an active bit-line node.
`rcr_net_preserve_idle_bit_line_ports`	`0`	When set to 1, preserves ports of parasitic networks that are connected to an idle bit-line node.
`rcr_net_preserve_active_state_ports`	`0`	When set to 1, preserves ports of parasitic networks that are connected to an active-state node.
`rcr_net_preserve_idle_state_ports`	`0`	When set to 1, preserves ports of parasitic networks that are connected to an idle-state node.
`rcr_net_preserve_san_to_dout_ports`	`0`	When set to 1, preserves ports of parasitic networks that are connected to a san-to-dout node.
`rcr_net_preserve_din_to_bitline_ports`	`0`	When set to 1, preserves ports of parasitic networks that are connected to a din-to-bitline node.
`rcr_net_preserve_san_ports`	`0`	When set to 1, preserves ports of parasitic networks that are connected to a san node.
`rcr_net_preserve_active_sa_to_gnd_ports`	`0`	When set to 1, preserves ports of parasitic networks that are connected to active nodes from sa to gnd.
`rcr_net_preserve_idle_sa_to_gnd_ports`	`0`	When set to 1, preserves ports of parasitic networks that are connected to idle nodes from sa to gnd.
`rcr_net_preserve_active_clk_to_sgc_ports`	`0`	When set to 1, preserves ports of parasitic networks that are connected to active nodes from clk to sa-to-gnd contolling gate.
`rcr_net_preserve_idle_clk_to_sgc_ports`	`0`	When set to 1, preserves ports of parasitic networks that are connected to idle nodes from clk to sa-to-gnd controlling gate.
`rcr_net_preserve_active_heavy_load_ports`	`0`	When set to 1, preserves ports of parasitic networks that are connected to active heavy load nodes.
`rcr_net_preserve_idle_heavy_load_ports`	`0`	When set to 1, preserves ports of parasitic networks that are connected to idle heavy load nodes.
`rcr_net_preserve_drain_source_signals`	`0`	When set to 1, preserves ports of parasitic networks that are connected to a source and drain device terminals, when set to 2, preserves drain/source on idle reg network, preserves on all ports for other no type network, when set to 3, preserves drain/source ports, when set to 4, do not preserve port for idle REG network, preserve all ports or drain/source port on other no type networks..
`rcr_net_preserve_idle_reg_drain_source`	`0`	When set to 1, preserves drain/source on idle reg network..
`rcr_net_preserve_active_reg_drain_source`	`0`	When set to 1, preserves drain/source on active reg network..
`rcr_net_merge_pn_idle_state_ports`	`0`	When set to 1, allows merging of those ports of power or vpn parasitic networks, that are connected to idle state nodes.
`rcr_net_active_word_line_conly`	`0`	When set to 1, short all resistors of the parasitic networks that are connected to an active word-line.
`rcr_net_idle_word_line_conly`	`0`	When set to 1, short all resistors of the parasitic networks that are connected to an idle word-line.
`rcr_net_active_bit_line_conly`	`0`	When set to 1, short all resistors of the parasitic networks that are connected to an active bit-line.
`rcr_net_idle_bit_line_conly`	`0`	When set to 1, short all resistors of the parasitic networks that are connected to an idle bit-line.
`rcr_net_active_state_conly`	`0`	When set to 1, short all resistors of the parasitic networks that are connected to an active state.
`rcr_net_idle_reg_conly`	`0`	When set to 1, short all resistors of the parasitic networks that are connected to an idle reg signal.
`rcr_net_idle_state_conly`	`0`	When set to 1, short all resistors of the parasitic networks that are connected to an idle state.
`rcr_net_state_idle_vpn_conly`	`0`	When set to 1, short all resistors of Idle VPN parasitic networks that are connected to state parasitic networks.
`rcr_net_floating1_conly`	`0`	When set to 1, short all resistors of FL1 parasitic networks that are connected to idle state parasitic networks.
`rcr_net_floating2_conly`	`0`	When set to 1, short all resistors of FL2 parasitic networks that are connected to idle state parasitic networks.
`rcr_net_floating3_conly`	`0`	When set to 1, short all resistors of FL3 parasitic networks that are connected to idle state parasitic networks.
`rcr_net_ground_conly`	`0`	When set to 1, short all resistors of ground parasitic networks.
`rcr_net_ground_reg_conly`	`0`	When set to 1, short all resistors of ground reg parasitic networks.
`rcr_net_active_sa_to_gnd_conly`	`0`	When set to 1, short all resistors of the parasitic networks that are connected to active nodes from sa to gnd path.
`rcr_net_idle_sa_to_gnd_conly`	`0`	When set to 1, short all resistors of the parasitic networks that are connected to idle nodes from sa to gnd path.
`rcr_net_dump_protect`	`0`	this parameter is used to dump all preserved nodes in RCR flow.
`rcr_net_option_file`		User specified RCR option for each specific node.
`rcr_fmax`	`1`	this parameter is used to set the max frequency used by rc reduction.
`rcr_rshort`	`1.00E-03`	this parameter is used to set the minimum value of resistor that should be cut.
`rcr_cgnd`	`1.00E-18`	this parameter is used to set the minimum value of capacitance that should be decoupled to ground.
`rcr_net_cgnd`	`1.00E-18`	this parameter is used by the rc net flow to set the minimum value of capacitance that should be decoupled to ground.
`bsource_rmin_val_mfactor`	`ignore`	Defines whether the bsource resistor min_val is scaled with the M-factor (scaled) or not (ignored). Possible values are scaled and ignore.
`mosvar_noscale`	`0`	Enable(0)/Disable(1) scale support for mosvar model.
`tmisweep`	`0`	Enable(1)/Disable(0) printing out of tmideg files when etmiPrint=1..
`dcmatchscaling`	`0`	Backward compatibility controller for dcmatch scaling behavior.
`dcmatch_fitting`	`0`	Dcmatch fitting (sigmaOut) for customer.
`negative_cap_opt`	`no`	Specifies the compensation level for negative capacitances. The degree of compensation is yes > es > hs > vs > ds > hfs > dcs > no. Default value is 'vs' for the mx, lx, and vx preset options of SpectreX and 'no' for other Spectre modes.. Possible values are no, yes, es, hs, vs, ds, hfs and dcs.
`negative_cap_opt_devices`	`[...]`	Specifies the models that should be compensated. For example, <option_name>=[bsim3v3] enables compensation for bsim3v3 model. <option_name>=[bsim3v3 bsim4] enables compensation for both bsim3v3 and bsim4 models..
`etmiprntfd`	`0`	Output the TMI result file. By default it is closed.
`dump_global_options`	`0`	Internal option for RelXpert to dump all the global options . By default it is closed.
`tmiaging_remove_slash`	`0`	Internal option to remove the slash character before dot in instance name. By default it is closed.
`output_compact_mapping`	`0`	Internal option for RelXpert to output compact mapping file. By default it is closed.
`tmipath`		Location of TMI shared object libraries to be used by tmiBsim4 models.
`tmiflag`	`0`	Activate TMI flow. By default TMI flow is not activated.
`tmimtsflag`	`0`	Activate TMI MTS flow. By default TMI MTS flow is not activated.
`macinitforminisolver`	`0`	Add to judge if pInit is called from Minisolver.
`omipath`		Location of OMI shared object libraries to be used by omi models.
`omiflag`	`0`	Activate OMI flow. By default OMI flow is not activated.
`omiage`	`0`	Activate OMI Aging model flow. By default, it is not activated.
`omisave`	`1`	Enable or disable aging information to be saved.
`omiinput`		Input file name, including the full path to read back TMI information for aging model.
`omisort`		Sort aging information.
`tmiage`	`0`	Activate TMI Aging model flow. By default, it is not activated.
`tmiinput`		input file name including full path to read back TMI information for aging model.
`tmisave`	`1`	Enable or disable aging information to be saved.
`etmiusrinput`		This option can be set in model files or netlists.
`tmisort`		Sort aging information.
`print_including`	`no`	Enable Spectre to print including information in include statement. Possible values are no and yes.
`annotateonalter`	`yes`	Annotate on all alter statements. Possible values are no and yes.
`reelaborateonalter`	`force`	Whether re-elaborate for every alter statement. Possible values are lazy and force.
`scale_redefined`	`ignore`	Disallow redefining of the option scale in netlist. Possible values are error, ignore and warning.
`printstep`	`no`	Enable Spectre to print results by equal step defined in .tran statement. Possible values are no and yes.
`inlinesubcktcurrent`	`subckt`	Save inline subcircuit terminal current as inline device current or subcircuit current. By default, inline subckt current is saved. Possible values are device and subckt.
`nonconv_topnum`	`10`	Top number of non-convergence nodes to be printed public.
`dotprobefmt`	`flat`	Print .probe signal with original name or hierarchical name. Possible values are flat and hier.
`hierprobe`	`hier`	Controls the hierarchical delimiter used in a hierarchical name. When `flat`, the delimiter used is the value of the `hier_delimiter` option. When `hier`, the delimiter used is `.` or dot.. Possible values are flat and hier.
`dcmmod`	`0`	DCMismatch analysis version selector. If set to 1 or 3. uses Bsim short-channel mismatch equation for BSIM3 and BSIM4 devices; if set to 2 or 3, provides compatibility with Monte Carlo analysis.
`vthmod`	`std`	Vth output selector. 'std' outputs model equation Vth; 'vthcc' outputs constant current Vth and may impact simulation performance; 'vthcc_ext' outputs constant current Vth on external nodes. Possible values are std, vthcc and vthcc_ext.
`noisemethod`	`noign`	option to control induced gate noise. noign: no induced gate noise. subckt: compatible with verilogA. Possible values are noign and subckt.
`vdsatmod`	`std`	Vdsat output selector. Possible values are std, gds and slow_gds.
`vdsat_c`	`0.08`	Coefficient for Gds based Vdsat.
`vdsat_vdl`	`0.3 V`	Coefficient for Gds based Vdsat.
`vdsat_vadj`	`0.0 V`	Coefficient for Gds based Vdsat.
`ivthn`	`0.0 A`	NMOS Vth current parameter.
`ivthp`	`0.0 A`	PMOS Vth current parameter.
`ivthw`	`0.0 m`	Width offset for constant current Vth.
`ivthl`	`0.0 m`	Length offset for constant current Vth.
`ivth_vdsmin`	`0.05 V`	Minimum Vds in constant current Vth calculation public.
`gform_vcr`	`0`	Use Gform for VCR device. Specify 1 for yes and 0 for no. Default is no.
`bin_relref`	`no`	When a global relref is used, signals share a common reference value for convergence checks. If there is a large voltage in the circuit this can artificially relax convergence checks for other signals. This option creates voltage bins so that large voltages do not impact nodes with small voltage swings. Possible values are no and yes.
`optimize_bsource`	`no`	Enable the optimization in bsource evaluation. Default value is res in ++aps and no in others.. Possible values are no, yes, res, cap, nores, nocap and rescap.
`optimize_diode`	`no`	Enable the optimization in diode evaluation. Possible values are no and yes.
`opt_diode_enhance`	`no`	Enable the optimization in diode evaluation in spectre x. Possible values are no and yes.
`optimize_bsimcmg`	`no`	Enable the optimization in bsimcmg evaluation. Possible values are no and yes.
`enable_device_bbox`	`no`	Enable writing bbox to param map. Possible values are no and yes.
`memory_estimate`	`no`	Enable calculate not optimized CMI memory. Possible values are no and yes.
`mdlthresholds`	`exact`	When set to exact, certain functions in MDL, for example, cross(), control the transient time-step to place a time-point at a threshold crossing. This can improve accuracy. However for applications such as cell characterization an interpolated value can give the required accuracy with better performance.. Possible values are exact and interpolated.
`dio_allow_scaling`	`no`	Use this flag to enable SCALE parameter for diode mode. Possible values are no and yes.

Stitching parameters


`spf`		This option specifies the DSPF file to be stitched and its stitching scope. The syntax is spf="scope filename". The scope can be a subcircuit or an instance. Use "spectre -h stitch" for more information.
`dpf`		This option specifies DPF file to be stitched and its stitching scope. The syntax is dpf="scope filename". The scope can be a subcircuit or an instance. Use "spectre -h stitch" for more information.
`spef`		This option specifies the SPEF file to be stitched and its stitching scope. The syntax is spef="scope filename". The scope can be a subcircuit or an instance. Use "spectre -h stitch" for more information.
`spfscale`	`1.0`	This option specifies the scaling factor of all the elements in the parasitic files (DSPF/SPEF/DPF). Use "spectre -h stitch" for more details.
`spfscaler`	`1`	This option specifies the scale factor for parasitic resistors.
`spfscalec`	`1`	This option specifies the scale factor for parasitic capacitors.
`spfinstancesection`	`1`	This option controls the backannotation of device parameters in the instance section of the DSPF file. If spfinstancesection is turned off, the instance section is ignored (that is, the device parameters are not changed during stitching). The default is on. Use "spectre -h stitch" for more information.
`spfxtorprefix`		This option specifies the prefix in the device or net names in the DSPF/SPEF/DPF file. The syntax is spfxtorprefix="substring [replace_substring]". Use "spectre -h stitch" for more information.
`speftriplet`	`2`	This option specifies the value to be used for stitching in the SPEF file. It is effective only when the values in the SPEF file are represented by triplets (for example, 0.325:0.41:0.495).. Possible values are 1, 2 and 3.
`spfbusdelim`		This option maps the bus delimiter between schematic netlist and parasitic file (i.e. DSPF, SPEF, or DPF). The option defines the bus delimiter in the schematic netlist, and optionally the bus delimiter in the parasitic file. By default the bus delimiter of the parasitic file is taken from the parasitic file header (that is, \|BUSBIT [], \|BUS_BIT [], or *\|BUS_DELIMITER []). If the bus delimiter is not defined in the parasitic file header, you need specify it using the spfbusdelim option in schematic netlist. For example, the option spfbusdelim="<>" is maps A<1> in the schematic netlist to A_1 in the DSPF file, if the bus delimiter header in the DSPF file is "_". The option spfbusdelim="@ []" maps A@1 in the schematic netlist to A[1] in the DSPF file (the bus delimiter in DSPF header will be ignored). See "spectre -h stitch" for more information.
`spfinstarraydelim`		This option specifies the supplemental bus delimiter, if more than one bus delimiter is used in pre-layout netlist (usually for instance array indexing). It is similar to the spfbusdelim option. Use "spectre -h stitch" for more information.
`spfpostparam`	`replace`	This option specifies the instance parameters sourced for stitched instances. When set to replace, only the post-layout parameters are used and the pre-layout parameters are discarded. When set to append, both pre-layout and post-layout parameters are merged for the stitched instances where the post-layout parameters have higher priority. Possible values are append and replace.
`spfswapterm`		This option specifies the swappable terminals of a subcircuit macro-model. The syntax is spfswapterm="terminal1 terminal2 subcktname". Use "spectre -h stitch" for more information.
`spfaliasterm`		At times, the terminal names of devices in DSPF/SPEF/DPF files are different from those in the simulation model library. This happens in technology nodes that use subcircuits to model devices. The syntax is spfaliasterm="<model\|subckt> <prelayout_term0>=<spf_alias1> <prelayout_term2>=<spf_alias2> ... <prelayout_termN>=<spf_aliasN>". Multiple statements are supported. Use "spectre -h stitch" for more information.
`spfpwrnet`		This option specifies power net during stitching..
`spfcnet`		This option specifies the net that has its total capacitance stitched. All other parasitic components such as parasitic resistors that are associated with this net are ignored. The complete hierarchical names are required and multiple statements are supported. Wildcards are supported. Use "spectre -h stitch" for more information.
`spfrcnet`		This option specifies the name of the net to be stitched with parasitic resistors and capacitors. The other nets are stitched with lumped total capacitances. Multiple statements are supported. Wildcards are supported and you can specify as many nets as needed. Complete hierarchical net names are required. Use "spectre -h stitch" for more information.
`spfnetcmin`	`0`	This option allows you to select the net for stitching by the value of its total node capacitance. If a net's total node capacitance exceeds spfnetcmin, all parasitics associated with the net are stitched correctly, otherwise, only the total capacitance is added to the net node. Use "spectre -h stitch" for more information.
`spfskipnetfile`		This option allows you to specify the nets to be skipped as a list in a text file. The syntax is spfskipnetfile="filename". Only one file can be specified. The format in the file is one line per net. Use "spectre -h stitch" for more information.
`spfmsglimit`		This option specifies the maximum number of messages to be printed in the spfrpt file. The syntax is spfmsglimit="number STITCH-ID_1 STITCH-ID_2". Use "spectre -h stitch" for more details.
`spfskipnet`		This option specifies the net to be skipped for stitching, that is, all parasitic components of the net are not stitched. Wildcards are supported. You can specify multiple spfskipnet statements. Use "spectre -h stitch" for more information.
`spfcnetfile`		This option has the same functionality as spfcnet, except that it accepts a text file in which all the C-only stitched nets are listed. Only one file can be specified. The syntax is spfcnetfile="filename". The format of the file requires you to specify one line per net. Use "spectre -h stitch" for more information.
`spfrcnetfile`		This option has the same functionality as spfrcnet, except that it accepts a text file in which all the RC stitched nets are specified. Only one file can be specified. The syntax is spfrcnetfile="filename". The format of the file requires you to specify one line per net. Use "spectre -h stitch" for more details.
`spfshortpin`	`yes`	short pin nodes if set to yes or 1.. Possible values are no and yes.
`spf_probe_mode`	`1`	Option to control probe name for spf node. If 0, flattened node name in format <net_name>#<flatten_nodename>, if 1, hierarchical node name following the net. Possible values are 0 and 1.
`spfskipinst`		This option specifies the instance to be skipped for stitching, that is, the nets and instances of this instance are not stitched. Wildcards are supported. You can specify multiple spfskipinst statements. Use "spectre -h stitch" for more information.
`spfskipsubckt`		This option specifies the subckt to be skipped for stitching, that is, the nets and instances in this subckt are not stitched. You can specify multiple spfskipsubckt statements. Use "spectre -h stitch" for more information.

Miscellaneous parameters


`ckptclock`	`0 s`	Clock time checkpoint period. Default is 1800s for Spectre.
`param_topchange`	`yes`	If set to yes, Spectre will support parametric topology change caused by device internal node changes when the device, model, or netlist parameter value is altered.. Possible values are no and yes.
`redefinedparams`	`error`	Specify whether parameters can be redefined in the netlist. When set to warning or ignore, the simulator allows you to redefine parameters in the netlist. However, it honors only the last definition of the redefined parameter. Depending on the value set, the simulator displays warning messages for the redefined parameters or does not display any message. When set to error, the simulator does not allow you to redefine parameters in the netlist and displays an error message. Possible values are error, ignore, warning and warn.
`redefinableparams`		If redefinedParams is enabled, parameters in this option can still be redefined..
`duplicateports`	`error`	Specify whether duplicate ports are allowed in the definition of the subcircuit. When set to warning or ignore, the duplicate ports are shorted. Depending on the value that is set, the simulator displays warning messages for the duplicate ports or does not display any message. When set to error, the simulator does not allow duplicate ports in the definition of the subcircuit and displays an error message. Possible values are error, ignore and warning.
`duplicate_subckt`	`error`	Specify whether duplicate subcircuit definitions are allowed. When set to warning or ignore, the simulator allows duplicate subcircuit definitions. However, it honors only the last subcircuit definition. Depending on the value that is set, the simulator displays warning messages for the duplicate subcircuit definitions or does not display any message. When set to error, the simulator does not allow duplicate subcircuit definitions and displays an error message. Possible values are error, ignore and warning.
`table_param_redefined_input`	`error`	Specify whether lines with total duplicate input columns are allowed in table file of table_param. When set to warning or ignore, the simulator allows lines with total duplicate input columns. However, it honors only the last line definition. Depending on the value that is set, the simulator displays warning messages for the lines with total duplicate input columns definitions or does not display any message. When set to error, the simulator does not allow lines with total duplicate input columns and displays an error message. Possible values are error, ignore and warning.
`duplicateinstance`	`error`	Specify whether duplicate instance definitions are allowed. When set to warning or ignore, the simulator allows duplicate instance definitions. However, it honors only the last instance definition. Depending on the value that is set, the simulator displays warning messages for the duplicate instance definitions or does not display any message. When set to error, the simulator does not allow duplicate instance definitions and displays an error message. Possible values are error, ignore and warning.
`duplicatemodel`	`error`	Specify whether duplicate Spectre model definitions are allowed. When set to warning or ignore, the simulator allows duplicate model definitions. However, it honors only the last model definition. Depending on the value that is set, the simulator displays warning messages for the duplicate model definitions or does not display any message. When set to error, the simulator does not allow duplicate model definitions and displays an error message. Possible values are error, ignore and warning.
`rmdg_preserve`	`no`	When enabled, all instances of masters specified in option preserve_master will not be removed even if they are dangling.. Possible values are no and yes.
`warning_limit`	`5`	The maximum number of warning messages to be displayed according to specified in the immediately following warning_id.
`use_veriloga`	`0`	Determine whether to take Verilog-A as high priority. If set to '1', the Verilog-A model takes priority over the other subckt/models. If set to '0', the Verilog-A model does not take priority over the other subckt/models..
`warning_change_severity`	`warning`	Change the severity of warning messages specified in the immediately following warning_id. Possible values are error, warning and notice.
`warning_id`	`[...]`	Vector of warning message identifiers, such as [SPECTRE-16462 SPECTRE-16684]. Used in conjunction with warning_limit or warning_change_severity.
`preserve_master`		Preserve all instances of the masters specified.
`preserve_inst`		Preserve the instances specified in the vector. Use 'preserve_inst=all' to preserve all instances.
`preserve_subckt`		Preserve all instances within the subcircuits specified.
`preserve_assert`	`lazy`	Specify whether to execute the preservation for voltage check for assert statements. If the value is lazy, only execute the preservation for current checking; otherwise it will execute complete preservation. Possible values are lazy and force.
`soa_warn`	`yes`	If soa_warn is no, SOA check will be disabled. Possible values are no and yes.
`idovvdsclamp`	`1e-9`	Option to tune the clamp value of IdovVds..
`soa_dest`	`file`	Destinations where SOA violations are written. If set to file, violations will be written in log. If set to sqldb, violations will be written in sqldb. Possible values are file and sqldb.
`BHT_New_Eval`	`1`	Option to choose which kind of evaluate function to use, 0 for old version with Vciei derivates and 1 for new one without Vciei derivates.
`cmi_opts`	`0`	The option for customer cmi.
`parasitics`	`0`	Set parasitics for RC reduction. When used as the scoped option, specify the "+mts" command line option. The option has higher priority than the value from the command line option, "+parasitics". When used as a global option, the value from the command line, "+parasitics", has a higher priority.
`portmismatch_severity`	`error`	If set ignore/warn/error out when ports number mismatch for subckt.. Possible values are error, ignore and warning.
`implicit_subckt_param`	`no`	Allows the implicit parameter to be declared for the spectre format. Possible values are no and yes.
`mdltrigtargmode`	`cross`	This option specifies how to evaluate the trig and targ of the output format. If mdltrigtargmode = deltax, we will use the deltax function to evaluate the trig and targ function. If mdltrigtargmode = cross, we will use the cross function to evaluate the trig and targ function. If mdltrigtargmode = details, we will output the trig and targ middle results. Possible values are deltax, cross and details.
`leaki_times`	`0`	Specifies input-steady state time points.
`macro_mos`	`[...]`	The list of subcircuit names, which is a macro model.
`skip_macro_mos`	`[...]`	The list of subcircuit names, which is skipped to be a macro model.
`hier_delimiter`	`.`	Used to set hierarchical delimiter. Length of hier_delimiter should not be longer than 1, except the leader escape character.
`missing_icnodeset`		Write the node which is not in the ic or nodeset to the file.
`hier_ambiguity`	`strict`	When set to lower, the simulator will partially flatten the hier name from the back to check if an object can be found. Lower is not recommended. Possible values are strict and lower.
`skip`	`none`	Skip the simulating specified subckt instances. For now, cut is supported, which will leave the subckt ports disconnected. Possible values are none, cut and load.
`podeautovdd`	`0`	When set to 1, find the max vdd of each pode automatically.
`hasmcmfactorcorrection`	`0`	Specifies whether this subckt or subckt instance has mfactor correction for montecarlo.
`mdlpsfoutput`	`no`	mdl output psf file into raw file or not.. Possible values are no and yes.
`exprProbeSeparated`	`yes`	for Fx or XPS, the expression probe output into separated stream or not. Possible values are no and yes.
`mc_scalarfile_flush_gradual`	`yes`	Determines if scalarfile was printed incremental or not.. Possible values are no and yes.
`mc_scalarfile_stat`	`default`	Determines how scalarfile statistics data is printed.. Possible values are default and transposed.
`mc_stat_list`	`default`	Determines how many scalarfile statistics function is printed.. Possible values are default and all.
`measureterm`	`pass`	If set to error, error out if two measures refer to the same node. Possible values are pass and error.
`devropt`	`none`	If set to all, diode, or mosfet, connected resistors will be folded to related instances.. Possible values are none, all, diode and mosfet.
`preservenode`	`none`	preservenode=save - preserve node during RC reduction if it is saved with individual save statement; make node port of rcnet, don't allow this node to be merged in port merging, no impact on node saved with wildcard. preservenode=none\|explicit - don't preserve saved nodes in RC reduction, just use waveform aliases (default). preservenode=all - doesn't do anything.. Possible values are none, all, explicit and save.
`probedepthcount`	`hierarchy`	Hierarchy count the instance level, delimiter counts the delimiter level. Possible values are hierarchy and delimiter.
`subckt_switch`	`full`	If set to simple, complex subckt will be mapped to simple subckt in mapsubckt. Possible values are full and simple.
`duplicate_module`	`error`	Specifies whether the duplicate module definitions are allowed. When set to warning or ignore, the simulator allows duplicate module definitions. However, it honors only the last module definition. Depending on the value that is set, the simulator decides whether to display warning messages for the duplicate module definitions or not. When set to error, the simulator does not allow the duplicate module definitions and displays an error message. Possible values are error, ignore and warning.
`ms_vpn`		The virtual power node names, globally.
`ms_vpnv`	`0 V`	The voltage value for the virtual power network sources in scope.
`ms_vgnd`		The virtual ground node names, globally.
`ms_vgndv`	`0 V`	The voltage value for the virtual power network grounds in scope.
`mtlinereuse`	`yes`	This parameter defines whether to reuse RLGC data for all mtline instances. If no, this feature is disabled. Possible values are no and yes.
`mtlinecachedir`		The directory in which the mtline RLGC data file will be written. If an absolute path is not given, the file will be written to /home/<username>/.cadence/mmsim/.
`mtlineemsolver`	`cpl`	EM 2D solver for transmission line. Possible values are lmg and cpl.
`disable_save_preserve`	`no`	Disables preserve by save statements. If no, does not disable the save preserve. If yes, disables the save preserve. Possible values are no and yes.
`mdlanalysisnames`	`original`	Flag to indicate whether or not to keep spectre analysis name in MDL flow. Possible values are rename and original.
`check_fanout_filter_mode`	`0`	Determine the fanout filtering mode: 0 is net based, 1 is node based. Default is 0..
`check_format`		Determine the format of the checker violation report. If set to sql, format is sqldb. If set to xml, format is xml and sqldb. If set to text, format is text and sqldb. If set to csv, format is csv and sqldb. If set to all, format is xml, text and sqldb.. Possible values are xml, text, csv, sql and all.
`mismatchlevel`	`0`	With default, mismatch parameter is defined based on parameter scope concept: mismatch parameter can only have one value in one scope. For example, if a mismatch parameter appears multiple times in a subckt of the netlist, that mismatch parameter has a unique value in that subckt for each Monte Carlo run. With mismatchlevel=1, the mismatch parameter is allowed to have a different value for each appearance in the same scope. Possible values are 0 and 1.
`local_meas`	`no`	Specify whether local measurements definitions are allowed. When set to ignore, the simulator allows local measurements definitions. Depending on the value that is set, the simulator displays warning messages for the local measurements definitions or does not display any message. When set to warning, the simulator does not allow and ignores the local measurement definitions with a warning message. Possible values are no and yes.
`uwiprecision`	`double`	Specify the uwi raw file precision. Possible values are double and float.
`ms_part_report`	`0`	Depth of the ms partition report, default is 0, disabled..
`tmi_fast_core_data`	`0`	Speed up TMI SOA/Age performance by fast TMI coredata evaluation..
`thermalmap`	`%C:r.raw`	Output raw data file name.
`ose_random_mod`	`0`	Use OSE Random Method. Possible values are 0 and 1.
`etmiIdsMod`	`0`	Switch to select Ids or total DC drain current for TMI core data ids.
`osc_output_port`		Output raw data file name.
`print_mode`	`probe`	Only works for XPS-S mode. When value is probe, XPS-S will convert .print to .probe. Generate netlist.print file when value is print.. Possible values are probe and print.
`passfail_reverse_logic`	`no`	Pass fail bisection treats NaN as PASS, while not NaN value as FAIL. Possible values are no and yes.
`ms_vpni_start`	`0.0`	MS mode start time to have accurate currents. enable vpn current feedback after this time..
`ms_vpni_stop`	`0.0`	MS mode stop time to have accurate currents. disable vpn current feedback after this time..
`diagnose_dump_topnum`	`5`	Top number to dump single device netlist.
`ignorevaref`	`yes`	Flag to remove Verilog-A signals from the computation of references for convergence tolerances, if it is enabled, simulation accuracy will be improved, but transient runtime may be increased. Possible values are no and yes.
`ignoredgref`	`yes`	Flag to exclude dangling nodes from quantity calculation. Possible values are no and yes.
`minr_mfactor`	`scaled`	whether minr will be scaled. Possible values are scaled and ignore.
`print_section`	`no`	If yes, output sections used in simulations. If no, do not output sections.. Possible values are no and yes.
`rmdgccs`	`no`	If yes, dangling controlled current source will be removed.. Possible values are no and yes.
`sortinstance`	`no`	Sort devices of the netlist. Possible values are no and yes.
`checktoppinconn`	`no`	Check if the top level subckts have dangling terminals. Possible values are no, warning and error.
`hsfe`	`no`	If yes, the same as +hsfe in command line.. Possible values are no, yes and always.
`macrocommand`	`no`	If yes, the same as +mac in command line.. Possible values are no, yes and csfe.
`keeprc_conn_termcur`	`yes`	If yes, it functions as the SFE_KEEPRC_CONN_TERMCUR environment variable is set. Possible values are no and yes.
`lkmatrix`	`yes`	When enabled, converts inductors and mutual inductors to single instance of rlck_matrix. Possible values are no and yes.
`skipinvalidalter`	`no`	If yes, the alter statement with an invalid object is ignored.. Possible values are no and yes.
`detect_path_acc`	`1`	Select a speed method for detecting critical path, possible values are 1 and 2..
`mtm_primitive`	`[...]`	Specify the primitive names which can be worked with +mac.
`inlinesubcktop`	`device`	Specifies whether inline subcircuit operating point should be saved as inline device operating point or subcircuit operating point. Default is device.. Possible values are device and subckt.
`bjt504ver`	`504.12`	mextram504 avalanche noise version control..
`check_ahdl_mode`	`1`	This option specifies how to handle AHDL in dyn_dcpath, dyn_floatdcpath, dyn_float_tran_stat. When set to 1, all AHDL are considered conducting. When set to 2, only elastic branches are considered conducting. Possible values are 1 and 2.
`spfr2iprobe`	`0`	Value for resistors to be replaced by iprobe.
`maxwildcardicreport`	`0`	Limit the number of wildcard ic/nodeset report to log file.
`bsimcmg_bug_fix`	`0`	Control bsimcmg fix, 1 for only disable dits fix.
`vlog_search_parameter`	`yes`	Search parameter in parent for vlog case.. Possible values are no and yes.
`expr_reltol`	`1e-12`	Relative tolerance for relational operators used in expression within the netlist.
`hbtmodel`	`hbt`	Specify to use ucsd_hbt or hbt. Possible values are hbt and ucsd_hbt.
`variation_overwrite`	`no`	support define variation with same name in a block and overwirte previous one.. Possible values are no and yes.
`meastype`	`no`	If set to yes, allow indenpendent from/to for trig and targ. Possible values are no and yes.
`probe_depth_zero`	`none`	all : will ignore level=0 or effectively set level=INT_MAX; none : will remove the probe statement since level=0 cannot find any names (default).. Possible values are all and none.
`sqldb_violating_ratio`	`no`	Print violating ratio value in sqldb file. Possible values are no and yes.
`dcgmethod`	`auto`	DC simulation gmethod and dptran_gmethod setting; auto: automatically switch gmethod to resolve convergence difficulties; both: set gmethod=both and dptran_gmethod=both; std: set gmethod=dev and dptran_gmethod=node. Possible values are auto, both and std.
`dcpath_bulk_current`	`no`	If set to yes, bulk current through MOSFET is traced, in dyn_dcpath (Transient based and Leakage based approaches) and dyn_floatdcpath (Transient based and Leakage based approaches) checks. If set to no, bulk current is not traced. This option is supported only in Spectre, Spectre APS and Spectre X. Possible values are no and yes.
`dc_reverse_swp`	`no`	Reverse the sweep order in DC sweep.. Possible values are no and yes.
`lprobe_vlth`	`1.0`	for logic probe ,it specifies the voltage threshold for the logic 0 (zero) state..
`lprobe_vhth`	`1.0`	for logic probe ,it specifies the voltage threshold for the logic 1 (one) state..
`pode_inst_names`	`[...]`	Specify the names that a PODE device can contain.
`pode_preserve_inst_names`	`[...]`	Specify the names of the PODEs to be preserved.
`pode_model_names`	`[...]`	Specify the names that a PODE model can contain.
`simkit_gmin_scaled`	`no`	If yes, gmin is scaled by mult in simkit models. Possible values are no and yes.
`expr_abstol`	`0.0`	Absolute tolerance for relational operators used in expression within the netlist.
`sci_lib`		The shared library containing a C model using the SpectreFX C-model interface will be loaded.
`rel_sfe_opt`	`no`	Apply pre-sim optimization for reliability analysis. Possible values are no and yes.
`outputmatchexcludeway`	`otheritem`	Assume 2 wildcard probe with except, assume net1 match wildcard2 and also match except for wildcard2, otheritem means go on trying the other wildcard .probe. break measn not match other wildcard .probe. Possible values are otheritem and break.
`pdkmacrosubckt`	`no`	If yes, spectre will detect instance whose next upcoming instance's name is current instance name + "_macro" and master name of such instance should be in the list provided by TSMC or user defined subckt with tmimacro=yes.Then, for any current measurement towards such instance, spectre will map the next upcoming instance's current to current instance. Possible values are no and yes.
`tmimacro`	`no`	If user defined subckt with tmimacro=yes,then we consider such subckt as TSMC provided macro subckt that used in option pdkmacrosubckt. Possible values are no and yes.
`enable_dcsweep_op_info`	`no`	Enable op point info output for every dc sweep points. Possible values are no and yes.
`do_const_check`	`yes`	Enable all constant parameter check in pre-simulation stage. Possible values are no and yes.
`dcic`	`yes`	Enable ic set in dc analysis. Possible values are no and yes.
`mpbusdelimiter`	`none`	mapping bus delimiter if set. Possible values are none, angle and square.
`local_tnom_primitive`	`0`	By default tnom is only applied locally to elements having a model definition inside the local scope, but not to primitive elements. The option local_tnom_primitive=yes will enable tnom to also be applied to all primitive instances inside the local scope..
`dc_fix_zero_diagonal`	`yes`	Fix matrix zero diagonal issue in DC simulation. Possible values are no and yes.
`ac_fix_zero_diagonal`	`no`	Fix matrix zero diagonal issue in AC simulation. Possible values are no and yes.
`bht_max_limit_temp`	`600.0`	Set the maximum limit for the iteration of the temperature value for BHT model..
`allowmz`	`yes`	Specify whether the data of bit vsource can have 'm' or 'z'. When it is set to 'no', simulator will error out if data contain 'm' or 'z'.. Possible values are no and yes.
`rangecheckseverity`	`error`	The severity given when Model or Inst parameter overide the range. error, msgerror for the basic Model/Inst paramter is out of range, and the simulation to stop; warning, msgwarning for the basic Model/Inst paramter is out of range, and continue the simulation.. Possible values are error and warning.
`negative_resistor_size_clamp`	`yes`	If yes, clamp negative leff/weff to 0. Possible values are no and yes.
`separatealiasmodel`		Specify primitive name to request simulator disable some optimizations to CMI instance so that sfeGetOriginalModelID(cmiInst) can get alias model name. It only used by model developer in special situation..
`dspf_subckt_wo_instance_call`	`ignore`	A flag that decides whether error out, or give warning, or ignore when a subckt from DSPF is not instantiated.. Possible values are ignore, warning and error.
`cabscut`	`-infinity F`	Capacitors with C<=abs(ccut) are replaced by open. cabscut can additionally be applied to variable capacitors using the option 'short_cut_var_elem=yes'.
`rmdg_veriloga`	`no`	If yes, dangling verilog-A instances will be removed.. Possible values are no and normal.
`createbinsofmodelgroup`	`active`	only create model data for actived binning model, create data for all binning cards if set to all.. Possible values are active and all.
`dspf_use_hier_delimiter`	`dspf`	A flag that decides whether to use netlist hier delimiter to replace DIVIDER of DSPF.. Possible values are schematic and dspf.
`override_spice_modelgroup`	`no`	Control Spectre's behavior when handling model bin definition whose model group's name has been specified before, if no, the new model bins. Possible values are no and yes.
`mdlpostfindsignalname`	`strict`	flag to decide to find a signal by name or store all signal names into a container then use the container to find name. Possible values are strict and ambiguous.
`mc_correlate_truncmode`	`correlatefirst`	Determines whether to calculate truncation firstly or to calculate correlation firstly for Monte Carlo statistical variables.. Possible values are truncatefirst and correlatefirst.

Important considerations for currents and useprobes options

Adding probes to circuits that are sensitive to numerical noise might affect the solution. In such cases, accurate solution may be obtained by reducing the value of reltol.

The following devices always use probes to save currents (even with useprobes=no): port, delay, switch, hbt, transformer, core, winding, fourier, d2a, a2d, a2ao, and a2ai.

senstype parameter

When senstype is set to partial, the sensitivity being calculated is the partial derivative of a differentiable output variable F with respect to a design parameter p:

D (F w.r.t. p) = --

This definition is not scale free. When senstype is set to normalized, the sensitivity being calculated is the normalized sensitivity

d ln F p dF p

S (F w.r.t. p) = ------ = - -- = - D (F w.r.t. p)

d ln p F dp F

When either F or p take a zero value, the above normalized definition no longer provides a useful measure in this case, the following two semi-normalized sensitivities are used:

dF dF

S (F w.r.t. p) = ------ = p -- = p D (F w.r.t. p) if F = 0

d ln p dp

And:

d ln F 1 dF 1

S (F w.r.t. p) = ------ = - -- = - D (F w.r.t. p) if p = 0

dp F dp F

When both F and p are zero, partial sensitivity is used.

topcheck parameter:

When topcheck=full, the topology check is performed and gmin is inserted between isolated nodes and ground. A heuristic topology check is also performed to find nodes that may be isolated due to the numerical nature of the circuit. For example, nodes isolated by reverse biased diodes in MOSFETS.

Use topcheck=fixall to attach gmin to all types of isolated nodes. Including the ones detected by the heuristic topology check.

When topcheck=min, the topology check is performed and gmin is inserted between isolated nodes and ground. A heuristic topology check is not performed.

When topcheck=no, the topology check is not performed.

topcheck=errmin (topcheck=errfull) is similar to topcheck=min (topcheck=full) but the simulation will stop if floating nodes are found.

Important considerations for using multithreading:

Multithreading is only available for devices evaluation for BSIM3v3 and BSIM4. Multithreading does not work with table model. If there is an instance of a primitive using table model, multithreading is not applied to all instances of that primitive.

Multithreading can be turned on/off using the command-line option, environment variable 'SPECTRE_DEFAULTS' setting, or by using the 'multithread' parameter in the 'options' statement from the input file. The command-line option takes priority over the 'SPECTRE_DEFAULTS' environment variable setting. In addition, the latter takes priority over the setting in the netlist options statement.

Using multithreading on circuits that are sensitive to numerical noise might affect the solution. The solution should still be within acceptable tolerance specified by the tolerance parameters in the Spectre input file. Because the order of evaluation of devices is different for each multithreading run of the same simulation, this could lead to different round off error in the computation. It is possible that the same result may not be reproducible when multithreading is used.

Multithreading works best when the following capabilities are not used: useprobes=yes, save-current/SOA/alarm for multithreaded devices.

When using device multithreading on hyperthreading enabled system:

Allows one threads for each physical processor.

Because the device evaluation is almost exclusively floating point computation and each physical processor still has one floating point unit, each can handle one device evaluation at a time. Allowing additional thread(s) for device evaluation on the same physical processor will not have any benefit.

On a multi-processor system with hyperthreading enabled, device multithreading would allow an extra thread for each additional physical processors. Multithreading performance not only depends on the simulator but also on how well the operating system manages multiple threads and multiple processes.

gmethod parameter

The parameter controls how conductance is stamped in the homotopy methods (other than dptran).

If gmethod=node the conductance is added from node to ground. In case of gmethod=dev the conductance is stamped in the devices.

dptran_gmethod parameter

This parameter controls how conductance is stamped in the dptran (homotopy) method. See gmethod for more information on how this option affects circuits.

auto_minductor parameter

When this parameter is set to yes, the simulator automatically calculates the missing second-order coupling by multiplying the two first-order coefficients. This calculation is only an estimation and may not be correct for many geometries.

For example, consider two mutual inductors K1 and K2:

K1 mutual_inductor coupling=.65 ind1=L1 ind2=L2

K2 mutual_inductor coupling=.65 ind1=L2 ind2=L3

In this example, Spectre automatically inserts the coupling between L1 and L3, if missing, and the coupling co-efficient is 0.65*0.65=0.4225.

* This option can be applied locally to a subckt by defining it inside a subckt definition or by using it with a subckt or inst scope:

subckt chip1 ( in out )

scopedOptions options tnom=27 scale=0.1

.......

ends chip1

subckt chip2 ( in out )

scopedOptions options tnom=25 scale=0.2

.......

ends chip2

o1 options scale=1.2 subckt=chip1

o2 options scale=1.5 subckt=chip2

o3 options scale=1.2 inst=pll

o4 options scale=1.5 inst=receiver

Return to top

Spectre Circuit Simulator ReferenceProduct Version 23.1, September 2023