Product Documentation
Virtuoso Layout Suite XL: Basic Editing User Guide
Product Version IC23.1, November 2023

extractVerifyWellSubstrateConnections

layout extractVerifyWellSubstrateConnections boolean { t | nil }

Description

Enables or disables the verification of the substrate in terms of open and short violations.

For example, no open markers are created between two disjoint substrate vias on the same net because the vias short to each other through the substrate. Or, a substrate short marker is created if a substrate via is created on a given net and placed over the substrate while the substrate is already polarized on another net by another substrate via.

The default is nil. The tool does not support deep well layers.

GUI Equivalent

None.

Examples

envGetVal("layout" "extractVerifyWellSubstrateConnections")
envSetVal("layout" "extractVerifyWellSubstrateConnections" 'boolean t)

Related Topics

Inherited Connections


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