Product Documentation
Virtuoso Layout Suite XL: Connectivity Driven Editing User Guide
Product Version IC23.1, November 2023

Multiple Pins Abutment

Layout XL supports the abutment of more than one pin to a wider single pin.

Multiple pins on the edge of a cell can also be abutted. Any pair of pins with the correct properties can trigger automatic abutment, but once automatic abutment has been triggered, other pins on that edge that touch pins on the cell it is abutted to will not trigger automatic abutment again. If those pins do not connect, auto-permute tries to resolve the conflict. If the conflict cannot be resolved, a connection violation is flagged.

Make sure that you define abutment in such a way that no Design Rule Checker (DRC) or connectivity violations are introduced by abutment between any selected pair of pins.

Snap Instances in the Direction Perpendicular to the Abutment

The layout environment variable abutPerpSnapOn controls whether Layout XL snaps an instance in the direction perpendicular to the abutment. When abutPerpSnapOn is set to t, Layout XL automatically snaps the moving instance vertically such that the lower-left y coordinates of the two abutting pins are the same.

Additional Pins on Ignored Instances

The abutment engine ignores instance terminals belonging to instances with the schematic properties lvsIgnore or ignore. This means that additional pins on ignored instances are also ignored, allowing abutment to take place where it otherwise would not and enabling a tighter placement of abutted components.

For example, a schematic has two MOS devices connected in series (one’s source to the other’s drain). The schematic also places a parasitic capacitor between these MOS devices. The capacitor has the ignore property attached to it. When generating the layout, Layout XL correctly ignores the capacitor and its pin, and abuts the two MOS devices.


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