cphStopLogicalElabAtPhysLeaf

layoutXL cphStopLogicalElabAtPhysLeaf boolean { t | nil }

Description

Stops the elaboration of the logical design hierarchy when a node is reached which maps to a physical leaf node. This lets you use the physical stop view list to limit the logical elaboration for large hierarchical designs that would otherwise take a long time to open or might not open at all in Layout XL.

The default is t, which means that the elaboration stops when it reaches a logical node that maps to one of the view names specified in the Physical stop view list field. In this case, global nets below the leaf instance in the schematic are not considered during the elaboration. If your design relies on such nets, Cadence recommends that you switch off this environment variable.

When set to nil, the logical design is fully elaborated when you launch the Configure Physical Hierarchy command.

• Change the Logical switch view list in the Global Bindings pane in the Configure Physical Hierarchy window.
• Close and re-open Layout XL and then choose Launch –Configure Physical Hierarchy again.

GUI Equivalent

None

Examples

envGetVal("layoutXL" "cphStopLogicalElabAtPhysLeaf")

envSetVal("layoutXL" "cphStopLogicalElabAtPhysLeaf" 'boolean t)

envSetVal("layoutXL" "cphStopLogicalElabAtPhysLeaf" 'boolean nil)

Related Topics

Physical Hierarchy Configuration

List of Layout XL Environment Variables

Setting Environment Variables