Product Documentation
Virtuoso Layout Suite XL: Connectivity Driven Editing User Guide
Product Version IC23.1, November 2023

LAM File Mapping Section

<>
  <LIB NAME="libName" >
    <CELL NAME="cellName" >
      <COMPONENT_TYPE>
        <NAME>compTypName</NAME>
        <LIB>libName</LIB>
      </COMPONENT_TYPE> 
      <VIEW NAME="viewName" >
        <LOGICAL_CELL>
          <LIB NAME="libName" >
            <CELL NAME="cellName" >
              <VIEW NAME="viewName" >
                <ROUNDING>roundingExpr</ROUNDING>
                <PARAMETERS>
                  <MAP>p1 p2 ; p3 p4 ; </MAP>
                  <INCLUDE>
                    <CHECK>l w fw</CHECK>
                  </INCLUDE>
                  <IGNORE>
                    <GEN>list_of_paramNames</GEN>
                    <CHECK>list_of_paramNames</CHECK>
                  </IGNORE>
                </PARAMETERS>
                <TERMINALS>
                  <MAP>t1 t2 ; t3 t4 ; </MAP>
                  <IGNORE>
                    <GEN>list_of_termNames</GEN>
                    <CHECK>list_of_termNames</CHECK>
                  </IGNORE>
                </TERMINALS>
              </VIEW>
            </CELL>
          </LIB>
        </LOGICAL_CELL>
      </VIEW>
    </CELL>
  </LIB>
</>

Description

Maps physical cellviews and parameter and terminal names to their counterparts in the logical design, specifies which parameters and terminal names are to be ignored for generation and for check, and overrides the component type setting for a specific physical cellview.

Statements

Statement

Description

<>

Encloses all the statements used to map physical cellviews, parameters, and terminals to their counterparts in the logical design.

<LIB NAME="libName" >

Specifies the physical library name and encloses all the statements relating to that library. The name must be enclosed in quotation marks.

<CELL NAME="cellName" >

Specifies the physical cell name and encloses all the statements relating to that cell. The name must be enclosed in quotation marks.

<COMPONENT_TYPE>

Encloses the component type group to which the current cell is assigned.

For example, the syntax below assigns the current cell to component type myPmos defined for lib1.

<COMPONENT_TYPE>
  <NAME>myPmos</NAME>
  <LIB>lib1</LIB>
</COMPONENT_TYPE>

<VIEW NAME="viewName" >

Specifies the physical view name and encloses all the statements relating to that cellview. The name must be enclosed in quotation marks.

<LOGICAL_CELL>

Specifies the logical cellview that corresponds to the current physical cellview. For example,

<LOGICAL_CELL>
  <LIB NAME=”lib1”>
    <CELL NAME=”cell1”>
      <VIEW NAME=”schematic”>
        .
        .
        .
      </VIEW>
    </CELL>
  </LIB>
</LOGICAL_CELL>

<ROUNDING>expression</ROUNDING>

Defines how parameter values are rounded when evaluated by Layout XL; for example,

<SROUNDING>(w 0.05 round)</ROUNDING>

Rounds the value of w to the nearest multiple of 0.05 nanometers.

<PARAMETERS>

Encloses the <IGNORE>> statements that specify which logical instance parameters are to be ignored for generation and check.

GUI: Options on the Parameters tab

<TERMINALS>

Encloses the <IGNORE> statements that specify which logical instance terminals are to be ignored for generation and check.

GUI: Options on the Terminals tab

<MAP>p1 p2 ; p3 p4 ; </MAP>

Maps a logical parameter (or terminal) name to the corresponding parameter (or terminal) in the physical view. For example, to map logical parameters D and G to physical parameters d and g, type the following.

<MAP>D d ; G g ; </MAP>

Do not enclose the mapping in quotation marks.

GUI: Name mapping (cell attributes only)

<INCLUDE>

Encloses the <CHECK> statements that specify which logical instance parameters are to be checked.

<CHECK>list_of_parameter_names</CHECK>

Lists the names of logical instance parameters that are checked by Check Against Source.

Separate each name with a single whitespace. Do not enclose the list in quotation marks.

GUI: To check

<IGNORE>

Encloses the <GEN> and <CHECK> statements that specify which logical instance parameters (or terminals) are to be ignored for generation or check.

<GEN>list_of_names</GEN>

Lists the names of logical instance parameters (or terminals) that are ignored by the following commands; Generate All From Source, Generate Selected From Source, Generate Clones, Check Against Source, Update Components And Nets, Update Layout Parameters, Update Schematic Parameters.

Separate each name with a single whitespace. Do not enclose the list in quotation marks.

GUI: Ignore for generation

<CHECK>list_of_names</CHECK>

Lists the names of logical instance parameters (or terminals) that are ignored by the Check Against Source command. Mismatches for any of the listed parameters are not reported by the check.

Separate each name with a single whitespace. Do not enclose the list in quotation marks. The list inherits all the parameter names from the Ignore for generation list.

GUI: Ignore for check

Example

<>
  <LIB NAME="lib1" >
    <CELL NAME="cellB" >
      <VIEW NAME="layout" >
        <LOGICAL_CELL>
          <LIB NAME="lib2" >
            <CELL NAME="cellF" >
              <VIEW NAME="symbol" />
            </CELL>
          </LIB>
        </LOGICAL_CELL>
      </VIEW>
    </CELL>
  </LIB>
  <LIB NAME="lib2" >
    <CELL NAME="cellE" >
      <COMPONENT_TYPE>
        <NAME>myNmos</NAME>
        <LIB>lib2</LIB>
      </COMPONENT_TYPE> 
      <VIEW NAME="layout" >
        <LOGICAL_CELL>
          <LIB NAME="lib1" >
            <CELL NAME="cellA" >
              <VIEW NAME="schematicB" >
                <ROUNDING>(w 0.01 round)</ROUNDING>
                <PARAMETERS>
                  <MAP>l L ; w W ; x X2 ; </MAP>
                  <IGNORE>
                    <GEN>w l</GEN>
                    <CHECK>a b c</CHECK>
                  </IGNORE>
                </PARAMETERS>
                <TERMINALS>
                  <MAP>B G ; X D ; Y S ; </MAP>
                </TERMINALS>
              </VIEW>
              <VIEW NAME="symbol" >
                <ROUNDING>(w 0.05 round)</ROUNDING>
                <PARAMETERS>
                  <MAP>l L ; w W ; </MAP>
                  <IGNORE>
                    <GEN>x y z</GEN>
                    <CHECK>d e f</CHECK>
                  </IGNORE>
                </PARAMETERS>
                <TERMINALS>
                  <MAP>D d ; G g ; S s ; </MAP>
                  <IGNORE>
                    <GEN>X</GEN>
                  </IGNORE>
                </TERMINALS>
              </VIEW>
            </CELL>
          </LIB>
        </LOGICAL_CELL>
      </VIEW>
    </CELL>
    <CELL NAME="cellG" >
      <VIEW NAME="layout" >
        <LOGICAL_CELL>
          <LIB NAME="lib1" >
            <CELL NAME="cellD" >
              <VIEW NAME="symbol" />
            </CELL>
          </LIB>
        </LOGICAL_CELL>
      </VIEW>
      <VIEW NAME="layoutS" >
        <LOGICAL_CELL>
          <LIB NAME="lib1" >
            <CELL NAME="cellD">
              <VIEW NAME="symbolS" />
            </CELL>
          </LIB>
        </LOGICAL_CELL>
      </VIEW>
    </CELL>
  </LIB>
</>

The example above

For cellview LAM specifies that

lib1/cellB/layout

The cellview maps to logical cellview lib2/cellF/symbol.

lib2/cellE

The cell is assigned to component type myNmos defined in library lib2.

lib2/cellE/layout

The cellview maps to logical cellviews lib1/cellA/schematicB and lib1/cellA/symbol.

When lib1/cellA/schematicB is used:

  • The value of the w parameter is rounded to the nearest multiple of 0.01 nanometers.
  • Logical instance parameters l, w, and x are mapped to physical parameters L, W, and X2 respectively.
  • Logical instance parameters w and l are not copied during layout generation; parameters a, b, and c are not checked by the Check Against Source command
  • Logical terminals B, X, and D are mapped to physical terminals G, D, and S respectively.

When lib1/cellA/symbol is used:

  • The value of the w parameter is rounded to the nearest multiple of 0.05 nanometers.
  • Logical instance parameters l and w are mapped to physical parameters L and W respectively.
  • Logical instance parameters x, y, and z are not copied during layout generation; parameters d, e, and f are not checked by the Check Against Source command
  • Logical terminals D, G, and S are mapped to physical terminals d, g, and s respectively.
  • Logical terminal X is ignored during layout generation.

lib2/cellG/layout

The cellview maps to logical cellview lib1/cellD/symbol.

lib2/cellG/layoutS

The cellview maps to logical cellview lib1/cellD/symbolS.

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