The automated device-level layout flow lets you derive WSPs and row regions automatically based on the device footprint, layers, and DRCs with minimal user input.
This section includes the following topics:
- How to generate a placement grid?
- How to create a row region using an existing row template?
- How to generate WSPs in a row region?
- How to import a WSP pattern from an existing WSP pattern file?
- How to generate constraints?
- How do I edit Modgens in the Auto P&R assistant?
- What are the supported circuit finders?