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auLvs Netlisting
This appendix briefly describes Analog LVS or auLvs (Analog and Microwave Layout Versus Schematic) netlister. It is the analog and microwave version of LVS, which originally ran only on digital designs. This information is applicable to any 4.4 or above versions of the Virtuoso® design framework II (DFII).
Using auLvs
You use the auLvs tool for designs that depend on CDF and AEL information and when you use the Analog Design Environment. You can run auLvs inside or outside the DFII environment.
To translate files from the DFII database format into an auLvs netlist, follow the steps below:
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Set the CDS_Netlisting_Mode variable in the
.cshrcfile toAnalogorCompatibilityso that the Analog LVS tool (auLvs) is used.The syntax for this variable issetenv
CDS_Netlisting_Mode"{Analog|Compatibility}" - Create an auLvs view for the cell by copying the symbol view to the auLvs view.
- Add the auLvs simulation information to the cell’s CDF.
Customization Using the .simrc File
You can further control the behavior of the netlist by using the simulation run control (.simrc) file. The parameters that you can include in the .simrc file are the same as those that are defined using the simSetDef SKILL function. This SKILL function defines variables only if they have not been defined previously (that is, during initialization when the si.env and .simrc files are read).
The following auLvs parameter can be set in the .simrc file:
Related Documentation on auLvs
| For information on | See the following Cadence documents |
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The topic Adding Component Description Format Simulation Information in the |
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Where the auLvs view (the default stopping view for auLvs) is required in a parasitic simulation |
The topic Adding Component Description Format Simulation Information in the |
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The chapter Netlist Functions in |
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The topic Modifying Simulation Information in the |
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