Product Documentation
Virtuoso Parasitic Aware Design User Guide
Product Version IC23.1, November 2023


Contents

1

Parasitic Aware Design in Virtuoso ADE Explorer, Virtuoso ADE Assembler, and Virtuoso Schematics L/XL

From the IC6.1.1 release, the availability of parasitic aware design functionality differs depending upon the software you access it from.

Licensing Requirements

Introducing Parasitic Aware Design in ADE Explorer, ADE Assembler and Schematics L/XL

Analog Design Flow Supported by Parasitic Aware Design

Views Supported by Parasitic Aware Design

Extracted View
Smart View

Accessing Parasitic Aware Design Functionality in Virtuoso Layout Suite XL/GXL

Smart-Parasitics Menu

Smart-Parasitics – Display Parasitics
Smart-Parasitics – Clear Parasitics
Smart-Parasitics – Overlay Layout
Accessing Smart View in ADE

Accessing Parasitic Aware Design Functionality in ADE Explorer, ADE Assembler and Schematics L/XL

Parasitics Menu

Parasitics – Set Up
Parasitics – Options
Parasitics – Parametric Variables
Parasitics – Show/Hide Parasitics
Parasitics – Report Parasitics
Parasitics – Refine Extracted View
Parasitics – Probe Design Inst/Net

Probing Out-Of-Context and In-Context

Out-Of-Context Probing
In-Context Probing

An Analog Simulation Flow using PVS

Preparing Cell Libraries
Creating an Analog Extracted View
Backannotating Parasitic Values
Performing Backannotation
Reporting and Probing Parasitic Values
Creating a Configuration
Simulating the Design in ADE Explorer
Out-of-context Probing in ADE Explorer

2

Parasitic Aware Design in ADE Explorer and ADE Assembler

Chapter Contents

Accessing Parasitic Aware Design Functionality

Customizing Parasitic Assistant Display
Parasitic Aware Design Workspace Configurations

Setting Up and Using Parasitics

An Introduction to Parasitic Estimates
Parasitics/LDE – Setup
Parasitics/LDE – Create Estimates
Parasitics/LDE – Create Filters
Parasitics/LDE – Report
Parasitics/LDE – Compare
Parasitics/LDE – Options

Extracted Parasitics

Related Information
An Introduction to Extracted Parasitics
An Introduction to Parasitic Filters
Extracted Parasitics Flow Overview
Optimizing an Extracted or Layout View

Parasitics & Electrical Setup Assistant

Accessing the Parasitics & Electrical Setup Assistant
The Parasitics & Electrical Estimates Assistant Toolbar
The Parasitics & Electrical Setup Assistant Estimate Editor
The Parasitics & Electrical Setup Assistant Context-Menu
Creating Parasitic Estimates
Entering Parasitic Sweeps
Saving Parasitic Estimates Created in the Current Session
Building the Parasitic/LDE View
Parasitic Stitching
Important Points to Consider for Parasitic Stitching of Resistance

Parasitic Filters Assistant

Accessing the Parasitic Filters Assistant
The Parasitic Filters Assistant Toolbar
The Parasitic Filters Assistant Context-Menu
Saving Parasitic Filters Created in the Current Session
Creating Parasitic Filters
Editing Parasitic Filters Parameter Values
Deleting Parasitic Filters
Refining the Extracted View

Parasitic Report Assistant

Parasitic Report Assistant Available Reports
Understanding Parasitic Report Results
Exporting Parasitic Reports
Setting Up Effective R Reports
Opening an Extracted View from the Parasitic Report Assistant and Cross-Probing Parasitics
Showing and Hiding Parasitics from the Parasitic Report Assistant
Comparison Reports

Parasitic Comparisons

Accessing the Compare Parasitics Form
Running DC Oppoint Simulation for Comparisons
Comparing Estimated Parasitics With Extracted Parasitics - Summary
Comparing Against a Refined Extracted View

The Parasitic Mode Toolbar

Applying Sweeps from the Parasitic Mode Toolbar

Parasitic Probing and Ultrasim

A

Parasitic Aware Design Environment Variables

msps

elaborateUsingConfig
stopViewList
switchViewList
userDefinedCDFUpdater

msps.backAnnotate

effectiveRWarnLimit
fontSize
xOffset
yOffset
sortBy
parasiticFile

msps.buildAnalog

setParasitics
analogExtractedViewName

msps.mode

disableAutoCreate
disableAutoUpdate

msps.parProbe

maxListSize
sortBy
parasiticProbeFile

mspsAv.backAnnotate

sortBy
parasiticFile

mspsAv.buildAnalog

setParasitics
analogExtractedViewName

mspsAv.instProbe

instProbeFile

mspsAv.options

sortBy
extNetGrouped
fontSize
xOffset
yOffset
maxConsecutiveMessages
displayExtNetNames
pResCompName
pCapCompName
pIndCompName
pMindCompName

mspsAv.parProbe

parasiticProbeFile
showR
showCoupledC
showDecoupledC
showSelfC
showL
showK

mspsAv.p2p

useReducer

mspsAv.refine

libraryName
scaleR
scaleL
scaleC
stitchParasitics

mspsAv.simProbe

saveOnlyExternalNodes
saveOnlyOneGroupInstNode

msps.layout

createMaxCapDuringTransfer
expandSchematicDevices
fingeringNames
gndCoupledCapToUnboundNets
ignoreBackAnnotatedDummyDevices
includeLayoutParasitics
includeLdeParameters
includeSchematicEstimates
individualInstCdfCallbacks
layerMapFile
ldeIgnoreModels
ldeParameterCacheEnabled
ldeParameterSource
ldeParameterTool
stitchFloatingNets
ldeSwitchSourceDrainTerms
lvsRuleFile
mfactorNames
mixSchEstWithLayoutParasitics
netlistView
referenceNet
singleFactorExpansion

msps.setup

showAllCellViews
netlistViewType
useNewSetupForm
ignoreLVSInstForStitching
lxRemoveDeviceForStitching

msps.stitch

reduceParallelCaps

msps.estimates

customRName
customRLib
customRCell
customRView
customLName
customLLib
customLCell
customLView
customKName
customKLib
customKCell
customKView
customCName
customCLib
customCCell
customCView
defaultR
defaultL
defaultK
defaultCC
defaultDC
viewName
scaleR
scaleL
scaleC
detailReport
reportFile

layoutXL

svDisplayResistance
svDisplayInductance
svDisplayCapacitance
svDisplayNodeName
svDotWidth
svResistanceThresholdMin
svResistanceThresholdMax
svCapacitanceThresholdMin
svCapacitanceThresholdMax
svInductanceThresholdMin
svInductanceThresholdMax
svInductorStyle

maestro.test

autoSyncMPC

B

Backannotation of dcOp / Transient Values for M-Factor Devices

Identifying M-Factor Devices
Grouping M-Factor Devices At Extraction Time
Using opParamExprList Functionality
Specifying Parameters to be Displayed

C

Parasitic Aware Design and Diva Verification

Diva Flow: Simulating Analog Circuits with Parasitic Aware Design

Overview
Preparing Cell Libraries
Creating Designs
Creating Extracted Views
Creating and Using a Configuration
Simulating the Design
Probing Parasitic Values
Backannotating Parasitic Values

Diva Flow: Simulating Mixed-Signal Circuits with Parasitic Aware Design

Overview
Estimating Delays (Pre-Layout)
Calculating Delays (Post-Layout)
Preparing for Post-Layout Mixed-Signal Parasitic Aware Design
Probing Parasitic Values

D

Parasitic Aware Design Workspace Configurations

Availability of Parasitic Aware Design Features

Key Bindings

Access Keys

Setting Parasitic Aware Design Options Using .cdsenv

Error Message Display

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