An amsd block contains statements that control AMS mechanisms during the elaboration phase of xrun (or during xmelab) in your design verification flow. The simulation front end (SFE) parser reads and applies elaboration statements during the elaboration phase and simulation statements during the simulation phase. amsd blocks are valid only for AMS simulation.
You can use statements in an amsd block to specify the design configuration, connect module settings, port mappings between SPICE and Verilog, as well as to configure a particular cell reference in a Verilog-AMS source file to be bound to a SPICE description of that cell. These AMS statements must appear only in an amsd block.
You can have more than one amsd block in one or more Spectre or SPICE source files. You can pass one or more such input files directly on the xrun command line. If you pass more than one input file, the SFE parser processes them in the order they appear on the command line.
You can put other Spectre-language commands in the input file as long as you do not put them in an amsd block. Other Spectre-language commands (such as your transient analysis command) must not appear in an amsd block.
If you pass a file containing an amsd block to xrun or to xmelab, you do not need to pass an analog simulation control file to xrun (or to xmsim), but the file must also contain your transient analysis statement in this case.
If you have a prop.cfg file from a previous release, you can set the AMSCB environment variable as follows to enable the internal translator to convert your prop.cfg file to an amsd block file, prop.cfg.scs: setenv AMSCB YES
The first time you run the elaborator on the design, the translator converts your file, you verify the content , then run the elaborator again, this time, using the AMS control file instead of the old prop.cfg file.