You can create CDL netlists using CDL Out or the Analog and Microwave Circuit Description Language (auCDL)
CDL Out translates an OpenAccess Virtuoso-Schematic design into a CDL netlist, which is suitable for verification products like Assura, Diva, and Dracula. CDL Out is useful in creating CDL netlists of digital designs. The following figure shows the inputs and outputs of CDL Out.
You must specify an si.env file when you use the si command to run CDL Out. The si command is the noninteractive, batch mode version of CDL Out.
Analog and Microwave Circuit Description Language (auCDL) is the netlister that is used to create CDL netlist for analog designs.
How to Create CDL Netlist for Digital Designs Using CDL Out?
How to Create CDL Netlists for Analog Designs?
