Create Pin Constraints from Symbol

Creates pin alignment constraints, which are the order and edge constraints, on pins in the layout based on their positions in the source symbol or schematic.

The tool tries to find the source symbol view and if not available, uses the bound schematic view. When using the symbol view, only the pins on the symbol boundary are considered, whereas in schematic view, all pins are considered.

In addition to creating pin constraints, pins that honor these constraints are generated in the layout canvas.These pins are evenly distributed along the edges of the PR boundary. The layout is synchronized with the symbol view. Pin constraints are applied to existing pins, missing pins are created, and pins are renamed so that they are synchronized with the symbol view.

Environment variable: pinTemplateCreatePinConstraints

Delete created pins and rails

Deletes all pins that were initially created by the Create Pin Template form.

Environment variable: pinTemplateDeletePinsRails

Create PG Pins

Creates power and ground pins in the LPPs specified using the corresponding LPP filter.

Environment variables: pinTemplateCreatePGPins, pinTemplateCreatePGPinsLPPList

Create PG Rails

Creates power and ground rails on the LPPs specified using the corresponding LPP filter.

Environment variables: pinTemplateCreatePGRails, pinTemplateCreatePGRailsLPPList

LPP Selection

Specifies the layers in which the rails are to be created. You can either type the LPPs or click Define to select from a list. The newly created pin and rail names are appended with a _<pin_number> suffix to create a strong pin model.

Pins and rails are automatically created on their respective wireType tracks. Power pins and rails are created on tracks with the Power wireType and ground pins and rails are created on tracks with Ground wireType.

You can use vfpGroundWireTypes, vfpPowerWireTypes, and vfpSignalWireTypes to define the mappings between pins and wire types.

Power Net

Specifies the net on which pins with signal type set to Power are to be created.

Environment variable: pinTemplatePowerNet

Ground Net

Specifies the net on which pins with signal type set to Ground are to be created.

Environment variable: pinTemplateGroundNet

Run Pin Optimization

Runs Pin Optimizer in All mode. The Pin Optimizer places pins in a manner that helps obtain the shortest possible net length, while ensuring perfect alignment of two pin nets. The tool honors design constraints such as side, edge, and order constraints. It also ensures that pin placement is blockage-aware, advance node WSP–aware, and wire type–aware.

Environment variable: pinTemplateRunPinOpt