B

Optimizing LEF Technology for Place and Route

This appendix contains the following information.

Overview

This appendix provides guidelines for defining the optimized technology section in the LEF file to get the best performance using Cadence^® place-and-route tools.

For the following guidelines, the preferred routing direction for metal1 and all other odd metal layers is horizontal. The preferred routing direction for metal2 and all other even metal layers is vertical. Standard cells are arranged in horizontal rows.

This appendix discusses the following LEF statements.

LAYER layerName
TYPE ROUTING ;
PITCH distance ;
WIDTH defWidth ;
SPACING minSpacing [RANGE minwidth maxwidth] ;
WIREEXTENSION value ;

END layerName

VIA viaName DEFAULT
[TOPSTACKONLY]
LAYER layerName RECT pt pt ; ...

END viaName

SPACING 
SAMENET
   layerName layerName minSpace [STACK] ;

END SPACING

Guidelines for Routing Pitch

The following is a summary for choosing the right pitch for an existing design library. For detailed information on determining routing pitch, refer to the Cadence Abstract Generator User Guide.

Pitch Measurement

DESIGN RULE No. 1

W.1	Minimum width of `metal1` = 0.23 μm
S.1	Minimum space between two `metal1` regions = 0.23 μm
W.2	Minimum and maximum width of `cut1` = 0.26 μm
E.1	Minimum extension of `metal1` beyond `cut1` = 0.01 μm
W.3	Minimum width of `metal3` = 0.28 μm
S.2	Minimum space between two `metal3` regions = 0.28 μm
W.4	Minimum and maximum width of `cut2` = 0.26 μm
E.2	Minimum extension of `metal1` beyond `cut2` = 0.01 μm

Although the minimum metal1 routing pitch is 0.485um from the design rule, you should use 0.56um instead, to match the metal3 routing pitch in the same preferred direction.

LEF Construct No. 1

LAYER metal1
TYPE ROUTING ;
WIDTH 0.23 ;
SPACING 0.23 ; 
PITCH 0.56 ;
DIRECTION HORIZONTAL ;

END metal1

LAYER metal3
TYPE ROUTING ;
WIDTH 0.28 ;
SPACING 0.28 ;
PITCH 0.56 ;
DIRECTION HORIZONTAL ;

END metal3

Recommendations

Use line-to-via spacing for both the horizontal and vertical direction.
Allow diagonal vias with the routing pitch.
Align the routing pitch for metal1 and metal2, with the pins inside the standard cells.
Have uniform routing pitch in the same preferred direction. The pitch ratio should be 2 - 3 or 1 - 2. It is better to define the metal1 pitch larger than necessary in order to achieve a 1 - 1 ratio because the metal1 width is usually smaller the metal2 and metal3 widths.

Pitch Recommendations for Library Development

All pins should be on the grid, and only those portions of the pins that are accessible to the router should be modeled as pins. For example, 45 degree pin geometry.
The height of the cell should be the even multiple of the metal1 pitch, and the width of the cell should be the even multiple of the metal2 pitch.
The blockage modeling, especially for metal1, should be simplified as much as possible. For example, it is very common for the entire area within the cell boundary to be obstructed in metal1, so use a single rectangular blockage instead of many small blockages.

Guidelines for Wide Metal Spacing

The SPACING statement in the LEF LAYER section is applied to both regular and special wires. You can use the Cadence® ultra router option frouteUseRangeRule to determine which objects to check against the SPACING RANGE statement. The default checks both pin and obstruction.

DESIGN RULE No. 2

S.1	Minimum space between two `metal1` regions = 0.23 μm
S.2	Minimum space between metal lines with one or both metal line width and length are greater than 10um = 0.6 μm

LEF CONSTRUCT No. 2

LAYER metal1
WIDTH 0.23 ;
SPACING 0.23 ; 
SPACING 0.6 RANGE 10.002 1000 ;

END metal1

Guidelines for Wire Extension at Vias

The following guidelines are for wire extension at vias.

DESIGN RULE No. 3

W.1	Minimum and maximum width of `cut1` = 0.26 μm
W.2	Minimum width of `metal2` = 0.28 μm
E.1	Minimum extension of `metal2` beyond `cut1` = 0.01 μm
E.2	Minimum extension of `metal2` end-of-line region beyond `cut1` = 0.06 μm

LEF CONSTRUCT No. 3

LAYER metal2
TYPE ROUTING ;
WIDTH 0.28 ;
SPACING 0.28 ;
PITCH 0.56 ;
WIREEXTENSION 0.19 ;   
DIRECTION VERTICAL ;

END metal2

VIA via23 DEFAULT
LAYER metal2 ;
 RECT -0.14 -0.14 0.14 0.14 ;        # Use square via
LAYER cut2 ;
 RECT -0.13 -0.13 0.13 0.13 ;
LAYER metal3 ;
 RECT -0.14 -0.14 0.14 0.14 ;        # Use square via

END via23

Recommendations

Use the WIREEXTENSION statement instead of defining multiple vias because the width of the metal2 in cut1 is the same as the default routing width of the metal2 layer.
The WIREEXTENSION statement only extends wires and not vias. For 65nm and below, WIREEXTENSION is no longer recommended because it may generate some advance rule violations if wires and vias have different widths.
Define the DEFAULT VIA as a square via.

Guidelines for Default Vias

The following guidelines are for default vias.

DESIGN RULE No. 4

W.1	Minimum width of `metal1` = 0.23 μm
W.2	Minimum and maximum width of `cut1` = 0.26 μm
E.1	Minimum extension of `metal1` beyond `cut1` = 0.01 μm
E.2	Minimum extension of `metal1` end-of-line region beyond `cut1` = 0.06 μm

LEF CONSTRUCT No. 4 (Case B)

LAYER metal1
TYPE ROUTING ;
WIDTH 0.23 ;
SPACING 0.23 ;
PITCH 0.56 ;
DIRECTION HORIZONTAL ;

END metal1

VIA via12_H DEFAULT
LAYER metal1 ;
 RECT -0.19 -0.14 0.19 0.14 ;        # metal1 end-of-line
 extension 0.6 in both directions
LAYER cut1 ;
 RECT -0.13 -0.13 0.13 0.13 ;
LAYER metal2 ;
 RECT -0.14 -0.14 0.14 0.14 ;

END via12_H

VIA via12_V DEFAULT
LAYER metal1 ;
 RECT -0.14 -0.19 0.14 0.19 ;        # metal1 end-of-line
 extension 0.6 in both directions
LAYER cut1 ;
 RECT -0.13 -0.13 0.13 0.13 ;
LAYER metal2 ;
 RECT -0.14 -0.14 0.14 0.14 ;

END via12_V

Recommendations

If the width of the end-of-line metal extension is the same as the default metal routing width, as in Case A, use the WIREEXTENSION statement in the LEF LAYER section, and define a square via in the DEFAULT VIA section.
If the width of the end-of-line metal extension is the same as the width of the via metal, as in Case B, define one horizontal DEFAULT VIA and one vertical DEFAULT VIA to cover the required metal extension area in both pregerred and non-preferred routing directions. Do not use the WIREEXTENSION statement in the LEF LAYER section.

Guidelines for Stack Vias (MAR Vias) and Samenet Spacing

The following guidelines are for stack vias (minimum area rule) and SAMENET SPACING.

DESIGN RULE No. 5

W.1	Minimum width of `metal2` = 0.28 μm
W.2	Minimum and maximum width of `cut2` = 0.26 μm
E.1	Minimum extension of `metal2` beyond `cut2` = 0.01 μm
A.1	Minimum area of `metal2` = 0.2025 μm
C.1	`Cut2` can be fully or partially stacked on `cut1`, contact or any combination
W.1	Minimum width of `metal3` = 0.28 μm
W.2	Minimum and maximum width of `cut3` = 0.26 μm
E.1	Minimum extension of `metal2` beyond `cut3` = 0.01 μm
A.1	Minimum area of `metal3` = 0.2025 μm
C.1	`Cut3` can be fully or partially stacked on `cut2`, `cut1`, contact or any combination

LEF CONSTRUCT No. 5

VIA via23_stack_north DEFAULT
LAYER metal2 ;
 RECT -0.14 -0.14 0.14 0.6 ;   # MAR = 0.28 x 0.74
LAYER cut2 ;
 RECT -0.13 -0.13 0.13 0.13 ;
LAYER metal3 ;
 RECT -0.14 -0.14 0.14 0.14 ;

END via23_stack_north

VIA via23_stack_south DEFAULT
LAYER metal2 ;
 RECT -0.14 -0.6 0.14 0.14 ;   # MAR = 0.28 x 0.74
LAYER cut2 ;
 RECT -0.13 -0.13 0.13 0.13 ;
LAYER metal3 ;
 RECT -0.14 -0.14 0.14 0.14 ;

END via23_stack_south

VIA via34_stack_east DEFAULT
LAYER metal3 ;
 RECT -0.14 -0.14 0.6 0.14 ;   # MAR = 0.28 x 0.74
LAYER cut3 ;
 RECT -0.13 -0.13 0.13 0.13 ;
LAYER metal4 ;
 RECT -0.14 -0.14 0.14 0.14 ;

END via34_stack_east

VIA via34_stack_west DEFAULT
LAYER metal3 ;
 RECT -0.6 -0.14 0.14 0.14 ;   # MAR = 0.28 x 0.74
LAYER cut3 ;
 RECT -0.13 -0.13 0.13 0.13 ;
LAYER metal4 ;
 RECT -0.14 -0.14 0.14 0.14 ;

END via34_stack_west

Recommendations

The minimum metal routing segment (two vias between one pitch grid) with or without end-of-line metal extension should automatically satisfy the minimum area rule.
If vias are stackable, create the TOPSTACKONLY vias with a rectangular shape blocking only one neighboring grid for both sides of the preferred routing direction. In other words, one north oriented and one south oriented for vertical-preferred routing layers, and one east oriented and one west oriented for horizontal-preferred routing layers.
Use slightly larger dimensions for the via size to make them an even number, so they snap to the manufacturing grids.
The STACK keyword in the SAMENETSPACING statements only allows vias to be fully overlapped (stacked) by SROUTE commands. To allow vias to be partially overlapped, set the environment variable SROUTE.ALLOWOVERLAPINSTACKVIA to TRUE.
The metal1 layer does not require a MAR via because all metal1 pins should satisfy the minimum area rules.

Example of an Optimized LEF Technology File

VERSION 5.8 ;

BUSBITCHARS "[]" ;

UNITS
DATABASE MICRONS 100  ;

END UNITS

LAYER metal1
TYPE ROUTING ;
WIDTH 0.23 ;
SPACING 0.23 ; 
SPACING 0.6 RANGE 10.02 1000 ;
PITCH 0.56 ;
DIRECTION HORIZONTAL ;

END metal1

LAYER cut1
TYPE CUT ;

END cut1

LAYER metal2
TYPE ROUTING ;
WIDTH 0.28 ;
SPACING 0.28 ;
SPACING 0.6 RANGE 10.02 1000 ;
PITCH 0.56 ;
WIREEXTENSION 0.19 ;
DIRECTION VERTICAL ;

END metal2

LAYER cut2
TYPE CUT ;

END cut2

LAYER metal3
TYPE ROUTING ;
WIDTH 0.28 ;
SPACING 0.28 ;
SPACING 0.6 RANGE 10.02 1000 ;
PITCH 0.56 ;
WIREEXTENSION 0.19 ;
DIRECTION HORIZONTAL ;

END metal3

LAYER cut3
TYPE CUT ;

END cut3

LAYER metal4
TYPE ROUTING ;
WIDTH 0.28 ;
SPACING 0.28 ;
SPACING 0.6 RANGE 10.02 1000 ;
PITCH 0.56 ;
WIREEXTENSION 0.19 ;
DIRECTION VERTICAL ;

END metal4

LAYER cut4
TYPE CUT ;

END cut4

LAYER metal5
TYPE ROUTING ;
WIDTH 0.28 ;
SPACING 0.28 ;
SPACING 0.6 RANGE 10.02 1000 ;
PITCH 0.56 ;
WIREEXTENSION 0.19 ;
DIRECTION HORIZONTAL ;

END metal5

LAYER cut5
TYPE CUT ;

END cut5

LAYER metal6
TYPE ROUTING ;
WIDTH 0.44 ;
SPACING 0.46 ;
SPACING 0.6 RANGE 10.02 1000 ;
PITCH 1.12 ;
DIRECTION VERTICAL ;

END metal6

### start DEFAULT VIA ###

VIA via12_H DEFAULT
LAYER metal1 ;
 RECT -0.19 -0.14 0.19 0.14 ;     # metal1 end-of-line ext 0.6
LAYER cut1 ;
 RECT -0.13 -0.13 0.13 0.13 ;
LAYER metal2 ;
 RECT -0.14 -0.14 0.14 0.14 ;

END via12_H

VIA via12_V DEFAULT
LAYER metal1 ;
 RECT -0.14 -0.19 0.14 0.19 ;     # metal1 end-of-line ext 0.6
LAYER cut1 ;
 RECT -0.13 -0.13 0.13 0.13 ;
LAYER metal2 ;
 RECT -0.14 -0.14 0.14 0.14 ;

END via12_V

VIA via23 DEFAULT
LAYER metal2 ;
 RECT -0.14 -0.14 0.14 0.14 ;
LAYER cut2 ;
 RECT -0.13 -0.13 0.13 0.13 ;
LAYER metal3 ;
 RECT -0.14 -0.14 0.14 0.14 ;

END via23

VIA via34 DEFAULT
LAYER metal3 ;
 RECT -0.14 -0.14 0.14 0.14 ;
LAYER cut3 ;
 RECT -0.13 -0.13 0.13 0.13 ;
LAYER metal4 ;
 RECT -0.14 -0.14 0.14 0.14 ;

END via34

VIA via45 DEFAULT
LAYER metal4 ;
 RECT -0.14 -0.14 0.14 0.14 ;
LAYER cut4 ;
 RECT -0.13 -0.13 0.13 0.13 ;
LAYER metal5 ;
 RECT -0.14 -0.14 0.14 0.14 ;

END via45

VIA via56_H DEFAULT
LAYER metal5 ;
 RECT -0.24 -0.19 0.24 0.19 ;
LAYER cut5 ;
 RECT -0.18 -0.18 0.18 0.18 ;
LAYER metal6 ;
 RECT -0.27 -0.27 0.27 0.27 ;

END via56_H

VIA via56_V DEFAULT
LAYER metal5 ;
 RECT -0.19 -0.24 0.19 0.24 ;
LAYER cut5 ;
 RECT -0.18 -0.18 0.18 0.18 ;
LAYER metal6 ;
 RECT -0.27 -0.27 0.27 0.27 ;

END via56_V

### end DEFAULT VIA ###

### start STACK VIA ###

VIA via23_stack_north DEFAULT
LAYER metal2 ;
 RECT -0.14 -0.14 0.14 0.6 ;   # MAR = 0.28 x 0.74
LAYER cut2 ;
 RECT -0.13 -0.13 0.13 0.13 ;
LAYER metal3 ;
 RECT -0.14 -0.14 0.14 0.14 ;

END via23_stack_north

VIA via23_stack_south DEFAULT
LAYER metal2 ;
 RECT -0.14 -0.6 0.14 0.14 ;   # MAR = 0.28 x 0.74
LAYER cut2 ;
 RECT -0.13 -0.13 0.13 0.13 ;
LAYER metal3 ;
 RECT -0.14 -0.14 0.14 0.14 ;

END via23_stack_south

VIA via34_stack_east DEFAULT
LAYER metal3 ;
 RECT -0.14 -0.14 0.6 0.14 ;   # MAR = 0.28 x 0.74
LAYER cut3 ;
 RECT -0.13 -0.13 0.13 0.13 ;
LAYER metal4 ;
 RECT -0.14 -0.14 0.14 0.14 ;

END via34_stack_east

VIA via34_stack_west DEFAULT
LAYER metal3 ;
 RECT -0.6 -0.14 0.14 0.14 ;   # MAR = 0.28 x 0.74
LAYER cut3 ;
 RECT -0.13 -0.13 0.13 0.13 ;
LAYER metal4 ;
 RECT -0.14 -0.14 0.14 0.14 ;

END via34_stack_west

VIA via45_stack_north DEFAULT
LAYER metal4 ;
 RECT -0.14 -0.14 0.14 0.6 ;   # MAR = 0.28 x 0.74
LAYER cut4 ;
 RECT -0.13 -0.13 0.13 0.13 ;
LAYER metal5 ;
 RECT -0.14 -0.14 0.14 0.14 ;

END via45_stack_north

VIA via45_stack_south DEFAULT
LAYER metal4 ;
 RECT -0.14 -0.6 0.14 0.14 ;   # MAR = 0.28 x 0.74
LAYER cut4 ;
 RECT -0.13 -0.13 0.13 0.13 ;
LAYER metal5 ;
 RECT -0.14 -0.14 0.14 0.14 ;

END via45_stack_south

VIA via56_stack_east DEFAULT
LAYER metal5 ;
 RECT -0.19 -0.19 0.35 0.19 ;   # MAR = 0.38 x 0.54
LAYER cut5 ;
 RECT -0.18 -0.18 0.18 0.18 ;
LAYER metal6 ;
 RECT -0.27 -0.27 0.27 0.27 ;

END via56_stack_east

VIA via56_stack_west DEFAULT
LAYER metal5 ;
 RECT -0.35 -0.19 0.19 0.19 ;   # MAR = 0.38 x 0.54
LAYER cut5 ;
 RECT -0.18 -0.18 0.18 0.18 ;
LAYER metal6 ;
 RECT -0.27 -0.27 0.27 0.27 ;

END via56_stack_west

### end STACK VIA ###

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LEF/DEF 5.8 Language ReferenceProduct Version 5.8, September 2022

B

Optimizing LEF Technology for Place and Route

Overview

Guidelines for Routing Pitch

DESIGN RULE No. 1

LEF Construct No. 1

Recommendations

Pitch Recommendations for Library Development

Guidelines for Wide Metal Spacing

DESIGN RULE No. 2

LEF CONSTRUCT No. 2

Guidelines for Wire Extension at Vias

DESIGN RULE No. 3

LEF CONSTRUCT No. 3

Recommendations

Guidelines for Default Vias

DESIGN RULE No. 4

LEF CONSTRUCT No. 4 (Case B)

Recommendations

Guidelines for Stack Vias (MAR Vias) and Samenet Spacing

DESIGN RULE No. 5

LEF CONSTRUCT No. 5

Recommendations

Example of an Optimized LEF Technology File

LEF/DEF 5.8 Language Reference
Product Version 5.8, September 2022