Product Documentation
Virtuoso Parameterized Cell Reference
Product Version IC23.1, September 2023

4


Creating SKILL Parameterized Cells

You can create Pcells in an ASCII file using SKILL instead of by using the graphical user interface. Complex Pcells are easier to create and maintain with SKILL than with the graphical interface.

Cadence recommends that you consider using Virtuoso Relative Object Design (ROD) functions in your Pcell code. ROD functions help you in defining layout connectivity, geometries, and the relationships between them. You can make a Pcell stretchable using ROD. For information about ROD, see Virtuoso Relative Object Design User Guide.

This chapter contains the following information:

The pcDefinePCell Function

The pcDefinePCell function lets you pass a SKILL definition for a Pcell to the Pcell compiler. This gives you another way to create Pcells. pcDefinePCell creates a Pcell master. This is the same result you get when you compile a graphical Pcell using Pcell – Compile – To Pcell in a layout window.

Each call to pcDefinePCell creates one Pcell master cellview. You can create one source code file for each Pcell or define several Pcells in one file. Either way, use the load(filename) command to load and run pcDefinePCell.

When you compile Pcell SKILL code, the compiler attaches the compiled code to the master cell. You do not need the source file containing the pcDefinePCell calls to be able to use your Pcell. But save the source file so you can revise it later.

The pcDefinePCell function passes three arguments to the Pcell compiler. Each argument is a list. For complete syntax and examples, see pcDefinePCell in the Virtuoso Parameterized Cell SKILL Reference.

Using the pcCellView Variable

pcCellView is an internal variable automatically created by pcDefinePCell. pcCellView contains the dbID (database identification) of the cell you are creating. Within the body of your Pcell code, use the pcCellView variable as the cellview identifier for which you create objects. For convenience, you might assign pcCellView to a variable with a shorter name; for example, cv=pcCellView.

Using the SKILL Operator ~> with Pcells

When you use the SKILL operator ~> to access information about the master cell of a Pcell instance, you must look two levels above the instance. If you look at only one level above, you access information about the Pcell submaster.

For example, for the instance I1 of the Pcell master mux2, you retrieve the database identity (dbID) of the mux2 Pcell master with the following statement:

I1~>master~>superMaster

However, if you use the following statement:

I1~>master

then, you can retrieve the dbID for the Pcell submaster.

Defining Parameter Values

You must specify all parameters that affect the Pcell in the pcDefinePCell statement. You must also assign a default value for every parameter.

The values of parameters on a Pcell instance can be assigned in any of the following ways:

The system looks for the values of parameters in a specific order. When the system finds a value, it stops looking, so where you define or assign values determine which value has highest priority.

The system looks for the value of parameters in the following order:

Be careful when you choose where you set the default values. When the system finds a value for a parameter, it stops looking. Therefore, if you are setting a parameter value for a Pcell in the pcDefinePCell code (number 4 in the image) and also in the CDF of the Pcell (number 2 in the image), ensure that the settings match. Otherwise, the Create Instance and Edit Instance forms will not work properly. In such cases, you can use the Debug CDF tool to identify and fix the issue.

If you prefer to get parameter default values from a library or technology file, you can access properties within the parameter declaration section of the pcDefinePCell statement as shown in the following example.

Example of Setting Parameter Values

In this example, the first line accesses a library and the second line accesses a technology file.

Building Geometries

You can use the following procedures to build shapes in a Pcell. Refer to Virtuoso Design Environment SKILL Reference for details about these procedures.

dbCreateLine( d_cellView (tx_layer [t_purpose]) l_points)
dbCreatePath( d_cellView (tx_layer [t_purpose]) l_points x_widths [t_pathStyle])
dbCreatePolygon( d_cellView (tx_layer [t_purpose]) l_points)
dbCreateRect( d_cellView (tx_layer [t_purpose]) l_bBox)
dbCreateEllipse( d_cellView (tx_layer [t_purpose]) l_bBox)
dbCreateDonut( d_cellView (tx_layer [t_purpose]) l_point x_outR x_holeR)
dbCreateLabel( d_cellView (tx_layer [t_purpose]) l_point t_label t_just t_orient t_font x_height)

Follow the guidelines below when using dbCreate functions to build objects:

Creating Instances within Pcells

It is often useful to create instances of other cells within a Pcell. You can also create Pcell instances within a Pcell. For example, inside your Pcell code, you can create the following:

  1. Get the cellview ID of the cell to add as an instance:
    cellId = dbOpenCellViewByType( gt_lib t_cellName lt_viewName)
  2. Create an instance of this cell:
    inst = dbCreateInst( d_cellView d_master nil l_point t_orient 1)
  3. If the instance is a Pcell, use
    inst = dbCreateParamInst( 
                d_cellView d_master nil l_point t_orient 1
                     list( 
                         list( param1Name "float" 10.) 
                         list( param2Name "string" "some string" )
                     ) ; close list
    ) ; close dbCreateParamInst

Building Nets, Terminals, and Pins

If you plan to use another tool that deals with layout connectivity, such as a router, device level editor, microwave extractor, or online extractor, you need to define the pins on your component layout cellviews. The pins in the layout cellview must match the pins in the schematic symbol cellview. The following steps show how to define pins in a layout Pcell.

  1. Create the shape that will serve as the pin.
    The shape is usually a rectangle.
    The shape cannot be a polygon.
    fig = dbCreateRect( d_cellView tx_layer list( x1:y1 x2:y2))
  2. Create the net to which the pin attaches.
    In this example, the pin name n1 matches the name of the corresponding pin in the schematic symbol for this cell:
    net = dbCreateNet( d_cellView "n1")
  3. Create a terminal on the same net.
    The terminal must have the same name as the net and match the terminal type. In this example, the terminal type is inputOutput, the same terminal type as the corresponding pin in the schematic symbol:
    trm = dbCreateTerm( d_net "n1" "inputOutput")
  4. Create a pin:
    pin = dbCreatePin( d_net d_fig "n1")
    The pin database object connects the pin figure with the net. The pin name can match the terminal name but does not have to. In the example, the pin name n1 matches the terminal name.
    Within the Pcell, you can have multiple shapes that all belong to the same electrical terminal. Each shape would have a pin to associate it to the same net. In such cases, each pin is created on the same net and must have a unique pin name.
  5. If your tool requires pins to have an access direction, define the access direction:
    pin~>accessDir = ’( "top" "left")
    The access direction is a list identifying the correct sides of the pin shape for connection.

Accessing Technology File Data

You can access nominal and minimum dimensions and other technology file information from within a Pcell, using tech procedures. Use tech procedures to keep process-specific information, such as layer-to-layer spacings, localized to the technology file. Make sure rules you want to read from the technology file are defined there before you load your Pcell code; otherwise, the Pcell compilation fails.

The following three examples show how to get data from the technology file.

Example 1

Access a single-layer spacing rule, such as the minimum width:

tf = techGetTechFile(d_cellView)
d = techGetSpacingRule(tf "minWidth" "layerName")

Example 2

Access a two-layer property, such as the minimum spacing between two layers:

d = techGetSpacingRule(tf "minSpacing" "layer1" "layer2")

Example 3

Access your own user-created property, such as the layer name for shapes:

techGetLayerProp(tf "layerName" "propName")

Variable Scoping

The code you include within the pcDefinePCell function can access only local variables and the input parameters to the Pcell. Procedures called from Pcells, however, can access global variables. To prevent unintended access of global variables, use a let or prog construct in your procedures to define local variables.

In some situations, you might want to access global variables. If so, see the example about accessing global variables in Debugging SKILL Pcells.

There is an example illustrating how to include user-defined procedures in a Pcell in Example 3: Calling User-Defined Procedures.

Schematic Symbol Pcells

The Virtuoso Schematic Editor design entry tool is built using the same graphic editor environment as the other Virtuoso tools. You can build schematic symbols as Pcells using SKILL. This makes it possible to have schematic symbols that change shape, depending on the parameters of the specific symbol instance.

The following example shows how to create a schematic symbol Pcell with the two parameters, inputLeads and outputLeads.

pcDefinePCell(
list( ddGetObj( "pcellLib") "MyPcell" "symbol" "schematicSymbol")
; formal parameters
    list(
        (inputLeads     "string" "1")
        (outputLeads    "string" "2")
    ) ;end of parameter list

In the above example, a schematic Pcell called MyPcell is created with two output leads and one input lead. You can change the size of the symbol by changing the values of the parameters.

For more information about debugging a schematic Pcell, refer to Pcell IDE - Quick Start Guide.

Advantages of ROD Functions in Pcell

Major advantages of using ROD to create Pcells are:

Using a Variable Number of Terminals

With Pcell symbols, it is possible to specify a variable number of terminals. The next figure shows the instances of variable inputs for the two nand Pcells.

The only limitation is that the netlisting software you use for simulation must be able to handle a variable number of terminals on these cells. For example, the microwave environment can handle a variable number of terminals on these cells.

If the application you want to use can handle a variable number of terminals, you can implement digital gates using Pcells. For example, instead of creating four or more NOR gate cells, each with a different number of inputs, you could create a single NOR gate cell with a cyclic parameter field that specifies the number of inputs.


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