absImportVerilog

absImportVerilog(
)
=> 0 / 1

Description

Creates cellviews from Verilog logical data.

Arguments

None

Value Returned

Options

Examples

Imports a Verilog file called myverilogfile1.

absSetOption "ImportVerilogFiles" "myverilogfile1"
=> 1
absImportVerilog
=> 1

Related Topics

Import Data in Abstract Generator