vrtCheckDesign
vrtCheckDesign(
[ d_cvid ]
[ ?layers l_layers ]
[ ?region l_region ]
[ ?all { t | nil } | ?checkDeadEndPins ?checkDeviceTrims ?checkDiffPins
?checkGatePins ?checkGridSanity ?checkPinWSPConformance ?checkSDPins
?checkSymmetry ?checkTracks ?checkTrimValidity ?checkVias ]
[ ?showLog | ?logVios | ?createMarkers ]
)
=> t / nil
Description
Runs pre-routing checks either on a whole cellview or on certain layers or a region of the design. You can either select the specific checks to run or run all available checks.
Arguments
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d_cvid
|
Database ID of the cellview to be checked. The database ID can be obtained using the geGetEditCellView SKILL function. The default value is the cellview of the current window.
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?layers l_layers
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Performs pre-routing checks on the specified list of layers. If no layer list is specified, the checks are run on all routing layers in the cellview.
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?region l_region
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The lower-left and upper-right coordinates of the region in which checks are to be performed. If no region is specified, everything inside the PR boundary or cell boundary is checked.
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?all { t | nil }
|
Runs all available pre-route checks. Alternatively, specify the individual checks to be run from the following list:
-
?checkDeadEndPins - Checks for the pins covered by blockages. -
?checkDeviceTrims - Checks for the cut shapes on device layers. -
?checkDiffPins - Checks the mismatch between diffusion pin net on device and top-level net. -
?checkGatePins - Checks for misalignment between WSP tracks and gate pins. -
?checkGridSanity - Checks grid sanity. -
?checkPinWSPConformance - Checks for misalignment between WSP tracks and top-level pins. -
?checkSDPins - Checks for the misalignment of WSP tracks with source and drain pins. -
?checkSymmetry - Checks symmetrical nets pin placement. -
?checkTracks - Checks the spacing of WSPs on tracks. -
?checkTrimValidity - Checks for the insufficient spacing for trim insertion. -
?checkVias - Checks for congestion or limitations for via placement.
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?showLog | ?logVios | ?createMarkers
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Specifies how the information obtained from the checks is presented to the user.
-
?showLog displays a violation log file. -
?logVios lists violations in the CIW. -
?createMarkers creates violation markers in the design.
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Value Returned
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t
|
The routing checks completed successfully.
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nil
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The routing checks did not complete due to errors.
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Examples
The following example runs all checks on the specified design.
vrtCheckDesign(geGetEditCellView() ?all)
The following example runs only the dead-end pin check on the current design.
vrtCheckDesign(?checkDeadEndPins ?checkSymmetry ?checkDiffPins)
Related Topics
Virtuoso Automated Placement and Routing SKILL Functions
vrtCheckDesign
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