Product Documentation
Virtuoso Layout Suite SKILL Reference
Product Version IC23.1, November 2023

vrtPowerRoute

vrtPowerRoute(
d_cvid
[ ?nets l_nets ]
[ ?layer l_layers ]
[ ?region l_region ]
[ ?options l_options ]
[ ?sharedTrack g_sharedTrack ]
[ ?net2WireTypes g_net2WireTypes ]
[ ?pullbacks g_pullbacks ]
[ ?postFixTrim g_postFixTrim ]
[ ?postFixMinLength g_postFixMinLength ]
[ ?postFixEolKeepout g_postFixEolKeepout ]
[ ?logFile g_logFile ]
[ ?appenToLog g_appendToLog ]
) 
=> t / nil

Description

Runs power routing on the nets in the design.

Arguments

d_cvid

Database ID of the cellview on which power routing is to be performed. The database ID can be obtained using the geGetEditCellView SKILL function. The default value is the cellview of the current window.

?nets l_nets

A list of net names on which power routing is to be performed. If no net list is specified, it routes all the nets in the cellview.

?region l_region

A list specifying the lower-left and upper-right coordinates of the region where power routing is to be performed. If no region is specified, all nets inside the PR boundary or cell boundary are considered.

?layers l_layers

A list of layers to perform power routing. If no layer is specified, power routing is performed on all layers.

?options l_options

List of objects for power routing. If no object list is specified, nothing is routed. The valid object types are: createPath, createVia, createPin, connectPin, createFigGroup, sharedTrack, postFixTrim, and postFixMinLength.

?sharedTrack g_sharedTrack

Boolean value to specify whether the power router share a same track to different power net.

?net2WireTypes g_net2WireTypes

Specifies the wire type location mapping for power nets.

?postFixTrim g_postFixTrim

Boolean value to specify whether to do a post trim patch fixing after power routing.

?postFixMinLength g_postFixMinLength

Boolean value to specify whether to do a post minLength drc error fixing after power routing.

?postFixEolKeepout g_postFixEolKeepout

Boolean value to specify whether to do a post end of line spacing drc error fixing after power routing.

?logFile g_logFile

Specifies the name of a log file in which router messages are captured.

?appendToLog g_appendToLog

Specifies that new messages are appended to the log file if it already exists. If set to nil, the existing file is overwritten.

Value Returned

t

Nets were power routed successfully without any errors.

nil

Routing was unsuccessful due to errors.

Examples

The following example runs the Power Route command on all the wires and vias between M1 and M2.

vrtPowerRoute(geGetEditCellView() ?layers '("M1" "M2") ?options '("createPath" "createVia"))

The following example inserts vias between M1 and M2 on vss and vdd net.

vrtPowerRoute(geGetEditCellView() ?nets '("vss" "vdd") ?layers '("M1" "M2") ?options '("createVia"))

The following example runs the Power Route command on all the PG nets to create wires and vias and create a figGroup from M1 to M3 inside PR boundary.

vrtPowerRoute(geGetEditCellView() ?region?geGetEditCellView()->prBoundary->bBox ?layers '("M1" "M2" "M3") ?options? '("cratePath" "createVia" "createFigGroup"))) 

Related Topics

Virtuoso Automated Placement and Routing SKILL Functions

vrtCheckDesign


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