Dynamic Glitch Check (dyn_glitch)
Spectre Syntax
title dyn_glitch parameter=value ...
SPICE Syntax
.cck title dyn_glitch parameter=value ...
Description
A glitch occurs when:
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A low signal goes above the mid level, and crosses the mid level again in a time less than the user-defined duration.
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A high signal goes below mid level, and crosses the mid level again in a time less than the user-defined duration.
The check applies only to blocks with single and constant power supply.
The results are written to a file with the extension dynamic.xml, which can be viewed with a Web browser.
Arguments
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node
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Nodes to which the check is applied. Default is none.
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duration
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Duration threshold of a glitch (default is 5ns).
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min_duration
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Minimum glitch duration threshold. Default is 0 sec.
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max_duration
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Maximum glitch duration threshold Default is 5ns.
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time_window
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Time window to which the circuit check is applied. Multiple non-overlapping time windows are supported. Default time window is 0 to tend.
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high
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High voltage level (default is none).
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low
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Low voltage level (default is 0V).
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mid
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Mid voltage level (default is 0.5*(high+low).
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inst
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Subcircuit instances to which the circuit check is applied. Default is inst=*
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xinst
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Subcircuit instances that are excluded from the circuit check. Default is none.
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subckt
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Instances of the specified subcircuit to which the circuit checks are applied. Default is subckt=*.
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xsubckt
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Instances of the specified subcircuit which are excluded from the circuit checks. Default is none.
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fanout
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Fanout setting to filter node with specified connection. Possible values are all, gate, and bulk. Default is all. This option is supported only in Spectre FastSPICE mode.
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depth
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Hierarchy level (from top level) to be checked. depth=3 reports errors on top level plus 3 sublevels. Default is 8.
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error_limit
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Maximum number of errors to be reported. Default is 10000.
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Related Topics
Dynamic Checks
Dynamic Float Crosstalk Check (dyn_floatxtalk)
Spectre Syntax
title dyn_floatxtalk parameter=value ...
SPICE Syntax
.cck title dyn_floatxtalk parameter=value ...
Description
Reports the glitches of high impedance nodes caused by crosstalk of parasitic capacitors in DSPF file. A high impedance state occurs when there is no conducting path from the node to any power supply or ground.
The following device conducting rules are used for the floating node detection:
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MOSFET is conducting if mos region is triode or saturation
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Resistors, controlled resistors, phy_res, relay and inductors are conducting if R<=res_th
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BJT is conducting if Vbe>bjt_vbe OR Ic>bjt_ith
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Diode is conducting if V>diode_vth
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Vsources and iprobes are considered conducting
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Isources, VCCS, and CCCS are conducting if i>isource_ith
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JFET is considered conducting
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Mutual inductors and controlled capacitors are not conducting
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VerilogA: conducting path depends on module details
The results are written to the dynamic.xml file, which can be viewed in a Web browser.
Arguments
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Design Check Parameters
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leaki_times
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Times at which the check is performed.
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rise_vth=0.2
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The threshold of voltage change caused by pulling up of an aggressor.
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fall_vth=0.2
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The threshold of voltage change caused by pulling down of an aggressor. Default is 0.2 V.
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cmin=1.0e-16
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If the lumped capacitance between highZ NET and its aggressor is less than cmin, Caggr<cmin, such aggressor is ignored. Default is 1.0e-16 F.
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capr=0.2
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If the ratio of between the lumped capacitance and the total capacitor of HighZ NET is less than capr, Caggr/Ctotal<capr, such aggressor is ignored. Default is 0.2.
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error_limit
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Maximum number of errors to be reported. Default is 10000.
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Floating Node Detection Parameters
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mos_ith
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Mosfet ids conducting threshold for high impedance node detection. Default is 100 nA.
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mos_gds
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Mosfet gds conducting threshold for floating node detection. Default is 1e-5.
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bjt_vbe
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BJT vbe conducting threshold for high impedance node detection. BJT is conducting if i>bjt_ith or vbe>bjt_vbe.
Default is 0.4V.
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bjt_ith
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BJT ith conducting threshold for high impedance node detection. BJT is conducting if i>bjt_ith or vbe>bjt_vbe. Default is 50nA.
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res_th_va
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Verilog-A resistor conducting threshold for high impedance node detection. This parameter is applicable only on AMS ie element, and on one or two-port AHDL module. Default is 10 MOhms.
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res_th
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Resistor conducting threshold for high impedance node detection. Resistor is conducting if R<res_th. Default is 1TOhms.
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diode_vth
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Diode voltage conducting threshold for high impedance node detection. Diode is conducting if v>diode_vth. Default is 0.6V.
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isource_ith
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Current source conducting threshold for floating node detection. Current sources are conducting if i>isource_ith. Default is 1pA.
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mos_conduct_rule=tri_sat
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The conducting rule to decide if a mosfet is on. Use tri_sat for triode or saturation region based rule. Use tri_sat_sub for triode or saturation or subthreshold region based rule. Use ids_gds for ids>mos_ith or gds>mos_gds rule. Use vgs for vgs>vth rule (Only supported in Fastspice). Possible values are tri_sat, tri_sat_sub, ids_gds, and vgs. Default is tri_sat.
Possible values are vgs, ids_gds, tri_sat and tri_sat_sub.
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Floating Node Detection Filtering Parameters
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node
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Nodes to which the floating node detection is applied.
Default is node=*.
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xnode
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Nodes that are excluded from floating node detection. Default is none.
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inst
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Subcircuit instances to which the circuit check is applied. Default is inst=*.
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xinst
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Subcircuit instances that are excluded from the circuit check. Default is none.
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subckt
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Instances of the specified subcircuit to which the circuit checks are applied. Default is subckt=*.
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xsubckt
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Instances of the specified subcircuit which are excluded from the circuit checks. Default is none.
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Related Topics
Dynamic Checks
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