Dynamic High Impedance Node Check (dyn_highz)
Spectre Syntax
title dyn_highz node=[n1 n2 ...] duration=<value> time_window=[start1 stop1 start2 stop2 ....] <save=no|violation> <spice=no|yes> <inst=[inst1 inst2...]> <xinst=[xinst1 xinst2...]> <subckt=[subckt1 subckt2....]> <xsubckt=[xsubckt1 xsubckt2....]> <depth=n> error_limit=<value> rest_th_va=<value> res_th=<value> isource_ith=<value> bjt_vbe=<value> bjt_ith=<value> diode_vth=<value> <inverse=no|yes> <sort=no|duration] <fanout=all|gate|bulk> <xnode=[node1 node2...]>
SPICE Syntax
.cck dyn_highz node=[n1 n2 ...] duration=<value> time_window=[start1 stop1 start2 stop2 ....] <save=no|violation> <spice=no|yes> <inst=[inst1 inst2...]> <xinst=[xinst1 xinst2...]> <subckt=[subckt1 subckt2....]> <xsubckt=[xsubckt1 xsubckt2....]> <depth=n> error_limit=<value> rest_th_va=<value> res_th=<value> isource_ith=<value> bjt_vbe=<value> bjt_ith=<value> diode_vth=<value> <inverse=no|yes> <sort=no|duration] <fanout=all|gate|bulk> <xnode=[node1 node2...]>
Description
Reports the nodes that are in high impedance state (also known as floating) for a duration longer than the user-defined threshold. A high impedance state occurs when there is no conducting path from the node to any power supply or ground.
The following device conditions are used:
-
MOSFET is conducting if
region is either triode or saturation. -
Resistors, controlled resistors, phy_res, relay, and inductors are conducting if
R<=res_th. -
BJT is conducting if
vbe>bjt_vbe or ic>bjt_ith. -
Diode is considered to be conducting if
v>diode_vth. -
Vsource and iprobes are conducting.
-
Isource, VCCS, and CCCS are conducting if
i>isource_ith. -
JFET is considered to be conducting.
-
Mutual inductor and controlled capacitors are considered to be non conducting.
-
Verilog-A: Conducting path depends on the module details.
The results are written to the dynamic.xml file, which can be viewed in a Web browser.
Arguments
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Design Check Parameters
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node
|
Nodes to which the check is applied. Default is none.
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xnode
|
Nodes to be excluded from the check. Default is none.
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duration
|
HighZ states with a duration longer than value are reported (default is 5ns).
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bjt_vbe
|
BJT vbe conducting threshold. Default is 0.4V.
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bjt_ith
|
BJT ith conducting threshold. Default is 50nA.
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res_th_va
|
Verilog-A resistor conducting threshold for high impedance node detection. This parameter is applicable only on AMS ie element, and on one or two-port AHDL module. Default is 10 MOhms.
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res_th
|
Resistor conducting threshold. Default is 1TOhms.
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isource_ith
|
Current source conducting threshold. Default is 1pA.
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diode_vth
|
Diode voltage conducting threshold. Default is 0.6V.
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inverse
|
If set to no, reports all nodes that are in highz state. If set to yes, reports all nodes that are not in highz state. Possible values are no and yes. Default is no.
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sort
|
Sort the violations. If set to no, no sorting is performed. If set to duration, violations are sorted based on duration. Possible values are no and duration. The default value is no.
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Filtering Parameters
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time_window
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Time window to which the circuit check is applied. Multiple non-overlapping time windows are supported. Default time window is 0 to tend.
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save
|
Specifies how to probe the signals specified within this circuit check. Possible values are:
-
no: None of the signals in this circuit check are probed. This is the default value. -
violation: Automatically probe the signals with violations under this circuit check.
|
|
spice
|
Specifies whether to save the probed signals specified by the save parameter in the SPICE syntax.
Possible values are:
-
yes: Saves the signals in SPICE syntax -
no: Saves the signals in Spectre syntax. This is the default value.
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error_limit
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Maximum number of errors to be reported. Default is 10000.
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fanout
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Fanout setting to filter node with specified connection. Possible values are all, gate, and bulk. Default is all.
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Wildcard Scoping
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inst
|
Subcircuit instances to which the circuit check is applied. Default is inst=*
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xinst
|
Subcircuit instances that are excluded from the circuit check. Default is none.
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subckt
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Instances of the specified subcircuit to which the circuit checks are applied. Default is subckt=*.
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xsubckt
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Instances of the specified subcircuit which are excluded from the circuit checks. Default is none.
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depth
|
Hierarchy level (from top level) to be checked. depth=3 reports errors on top level plus 3 sublevels. Default is 8.
|
Example
Spectre Syntax
hz1 dyn_highz node=["*"] duration=2e-09 time_window=[1e-09 1e-08]
SPICE Syntax
.cck hz1 dyn_highz node=["*"] duration=2e-09 time_window=[1e-09 1e-08]
The above command will report all nodes that were in a high impedance state for a duration longer than 2e-09s within the time window between 1e-09s and 1e-08s. The following is an example of the report that is displayed in the Web browser:
Related Topics
Dynamic Checks
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