Product Documentation
Spectre FX Circuit Simulator User Guide
Product Version 23.1, September 2023

.lprobe or .lprint

Syntax

.lprobe tran [low = value] [high = value] [name1 = ]ov1 [[name2 = ]ov2] ... [[namen = ]ovn] [depth = value] [subckt = name] [exclude = pn1] [exclude = pn2] ... [preserve=none|all|port]

Description

In Spectre FX, .lprint is automatically converted to .lprobe. These statements set up logic probes on nodes for the specified output quantity. The results are sent to a waveform output file. These statements can contain hierarchical names and wildcards for nodes or elements, and can be embedded within the scope of a subcircuit.

Arguments

Name Description

tran

Defines the analysis type (transient).

ov1, ov2

Specifies the simple output variables and uses the v(node_name) format. The name can be hierarchical and contain wildcards (for example, x?1.*.n*).

low = value

Specifies the voltage threshold for the logic 0 (zero) state. The 0 (logic low) state is probed if the node voltage is less than or equal to low. If the node voltage is between low and high, the X state is probed.

high = value

Specifies the voltage threshold for the logic 1 (one) state. The 1 (logic high) state is probed if the node voltage is higher than or equal to high. If the node voltage is between low and high, the X state is probed.

depth = value

Specifies the depth in the circuit hierarchy to which a wildcard name applies to. If set to 1, only the nodes at the current level are applied (the default value is infinity).

subckt = name

Specifies the subcircuit to which the statement applies to. By default, it applies to the top level. If the statement is already specified in a subcircuit definition, this parameter is ignored. Setting this parameter is equivalent to defining the statement within a subcircuit declaration.

exclude = pn1, pn2

Specifies the output variables to be excluded from the probe. Names can be node or element names, and can contain wildcards.

preserve=none|all|port

Defines the content of nodes probed with wildcard probing.

none probes all nodes and ports connected to active devices (default). Nodes connected only to passive elements are not probed.

all probes all nodes, including nodes connected to passive elements, and probes all ports.

port probes only the ports in subcircuits.

Examples

.lprobe low = 0.5 high = 4.5 v(n1)

The voltage on node n1 is converted to logic values using the low and high thresholds, and then output to the waveform output file.

.lprobe low = 0.5 high = 4.5 v(*) v(BUF.n1) depth = 2 subckt = INV

The logic states are probed for all the nodes within the subcircuit named INV and one level below in the circuit hierarchy. In this case, the reported names of BUF are appended to the circuit call path from the top level to INV. This is equivalent to a situation where the statement '.lprobe tran v(*) depth = 2' is in the subcircuit definition of INV in the netlist file.

.lprobe tran v(*) subckt=VCO preserve=all

RC reduction is constrained to preserve all nodes in VCO. Voltage probing is performed for all nodes in VCO, including internal nodes that are only connected to resistors and capacitors.

.lprobe tran low = 0.5 high = 4.5 v(*) exclude=net* exclude=bl* 

All node voltages are probed except for node voltages matching the pattern net* and bl*.

Related Topics

.probe or.print

save

.measure


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