Running the Pin Accessibility Checker

To run the Pin Accessibility Checker:

1. In CIW, select Tools – Check Pin Accessibility.
   The Pin Accessibility Checker form appears
   
   
2. In the Technology LEF section:
   1. Click Browse and select a technology LEF file in the LEF File(s) field. Selection of multiple LEF files is supported in the LEF File(s) field and you can select the files from the Select technology LEF file(s) form.
      
      
   2. Click Load to load the LEF file.
3. In the Design Information section:
   1. Select one or more standard cell libraries from the Lib(s) list. Standard cell names in the Cell(s) field are automatically populated based on the selected libraries.
   2. Specify one or more cells in the Cell(s) field. Click Define to open the Browse Cell(s) window, from which you can select the required standard cells.
   3. Specify one or more views in the View(s) field.
   4. In Output Directory, specify the name of the directory in which all temporary files and views are to be stored.
4. In the Placement Topology section:
   1. Select a placement topology for the standard cells from the Select list in the Placement Topology section. The available options are:
      • Left_Right: Places the same cell six times with the R0 and MY orientations.
        
        
      • Top_Bottom: Places the same cell three times with the R0, R180, and MY orientations.
        
        
   2. Specify the cell utilization in the Utilization% field. This is the area to be used for routing.
   3. From the Snap to Grid drop-down list, select the routing metal layer grid to which the cells are to be snapped.
   4. From the Add Via on PG Rail drop-down list, select a value if vias are to be generated on the power or ground rails.
   5. Specify the width of rails in the Rail Width field. For example, you can make the width wider than the one drawn in the layout.
5. In the Router Options section:
   1. Select the highest routing layer from the Routing Layers list. All lower metal layers up to the specified layer are used for routing.
   2. Specify the width and spacing values for each routing layer in the Layer Width/Spacing field. Click Define to open the Layer Width Spacing constraint table in a new window. You can edit the values directly in the table. Close the window to populate values in the Layer Width/Spacing field.
      
      
   3. Select a voltage value from the Voltage drop-down list to switch on high voltage rule-based routing.
      This option is applicable only to input designs with voltage spacing rules defined in the technology file.
   4. Specify the nets that are to be routed first in the Critical Net field.
   5. Select Double Cut Vias to insert double-cut vias in critical nets.
   6. Select Run Router to run the Innovus NanoRoute router on the standard cell extended pins view and generate a routed view.
   7. Select Check Violations in Router to open the Innovus router graphical user interface and view any violations in the routed topology view after running the router. This requires the Cadence Innovus license to be checked out.
6. Click Apply to run the router and generate the Pin Accessibility Check report.
   
   

The Pin Accessibility Checker report lists violations, critical net statistics for each cell, and length of metals in non-preferred direction. You can run the tool on different topologies to identify the one that suits your requirements.

When you select Use Double Cut Vias and specify a Critical Net value, the Pin Accessibility Checker report displays the number of single-cut and double-cut vias per net for each cell.

The Pin Accessibility Checker report also includes information about the length of routing metals in the non-preferred direction.

In a routed view, violation markers are created over single-cut vias in the Annotation Browser as shown in the following figure.

When you select Check Violations in Router, a routed view appears in the Innovus user interface, which lets you analyze the violations reported during routing.

The Pin Accessibility Checker report is stored at a default location. This report is saved as a log file for each cell and maintains the details of DRC issues and via information. You can open the log file using the following path in the CIW.

<temporary_directory_name>/<newly_created_library_directory>/<cellName>_pac/<routed_view_name>/<cellName>_pac.log

Related Topics

Pin Accessibility Checker