Importing Data with Verilog In

To import data files with Verilog In:

1. Open the Verilog In form.
   The Import Options tab appears.
2. Specify the files you want to import in the Verilog Files to Import field.
   You can specify multiple files with paths.
3. Specify the library where the file must be imported in the Target Library Name field.
4. Specify the names of any reference libraries you need in the Reference Libraries field.
   The following figure illustrates an example, where the file can_counter.v is imported to the library myLib and uses the reference libraries sample and basic.
   
   
5. Specify any other options you need by expanding the relevant sections.
   For example, if you want the imported file to have a custom view name, such as importedFileSymbol, instead of the default view name symbol, expand the Import Modules as section, and type the custom name in the Symbol View Name field.
6. If required, set the global net options as follows:
   1. Click the Global Net Options.
   2. Expand Global Nets and specify the global nets, connect nets by name options, and net expressions, as required.
   3. Select and expand Create Net Expression to create net expressions and specify the property name for power and ground nets.
7. If required, set the schematic generation options as follows:.
   1. Click the Schematic Generation Options.
   2. Specify the configuration for the schematic to be generated. For this, set the option in the relevant section.
      For example, if you want to generate the schematic without any placement and routing, deselect the Full Place and Route check box.
8. Click OK or Apply.

Verilog In imports the design into the Virtuoso Studio Design Environment format and places it in the specified library.

For details on the fields in all tabs, see Verilog In Form.

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