Product Documentation
Virtuoso Glossary
Product Version IC23.1, June 2023


Contents

Glossary

A

abutment
AEL expression
analog placement
aspect ratio

B

bbox
binder
block rings
bounding box

C

CDF
.cdsinit
cell
cell plan
cell row straps
cellview
chaining
CIW
clone
clone family
cloning
Command Interpreter Window (CIW)
Component Description Format (CDF)
component type
complex binding
conduit router
Configure Physical Hierarchy (CPH)
Connectivity-driven design
connectivity extraction
constraint
constraint aware editing
constraint group
Constraint Manager
core rings
current directory

D

DRD
default value
design
design library
detail router
device
device correspondence
Dynamic Selection Assistant

E

environment
externally connected pins

F

feedthrough pin
floorplanning
folding

G

geometric wire
global router
guard ring

H

halo
hierarchy
hierarchy configuration
highlights

I

instance
internally connected pins
iterated instances

L

LAM file
layer
Layer Selection Window (LSW)
library
library and attributes mapping file
Library Manager
local router
Logical connectivity
LPP (layer purpose pair)
LSW
LVS-clean design

M

master cell
master symbol
modgen
multipart path (mpp)
must-connect pins

N

Navigator
net

P

pad rings
pan
parameterized cell (Pcell)
path
pathSeg
Pcell
physical binding
physical configuration cellview
Physical connectivity
pin
pin permutation
pin-to-trunk connections
post-route refinement
power router
process rule
Process Rule Editor
property
pseudoparallel connection

R

reference point
reference library
relative object design (ROD)
ROD
route cells
routing

S

schematic cellview
scheme
search path
segment of a path
selection
SKILL
Space-based Router
stripes
strongly connected pins
symbolic wire
symmetric nets
synchronous clone

T

technology file
terminal
top-down design

U

uniquification

V

variants
viaDefs
via insertion
via pile (via stack)
view
view type

W

weakly connected pins
well
wire
wire editor

X

.Xdefaults
XL-compliant design

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