Known Problems and Solutions in Virtuoso NC Verilog
This document describes known issues with the Virtuoso® Verilog Environment for NC-Verilog Integration (NC Verilog Environment) and suggests the workarounds for these issues. Each issue is identified by a Cadence Change Request (CCR) number.
Unless otherwise stated, the issues described in this document were identified in IC23.1 or an earlier release. For a list of the issues that were fixed in this release, check the README file at downloads.cadence.com.
Related Topics
CCR 1104924: Simulation settings do not update when you switch between the NC Verilog Environment and the SystemVerilog Integration Environment
For the description and workaround of this issue, see the SystemVerilog Integration Environment Known Problems and Solutions.
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