Product Documentation
Virtuoso Voltage Dependent Rules Flow Guide
Product Version IC23.1, November 2023

B

Voltage Dependent Rules Functions

The list below lets you access information about syntax, descriptions, and examples for the Cadence® SKILL functions associated with the Virtuoso® voltage dependent rules flows. Only the functions listed here are supported for public use. Any other functions, and undocumented aspects of the functions described below, are private and subject to change or removal at any time.

VDR-related SKILL Functions

The functions listed below let you create and remove voltage labels for the nets in your design:

VDR-related Database Access SKILL Functions

The functions listed below let you manipulate voltage values for nets directly in the design database.

For detailed information, click any of the links above or see Chapter 2, “Database Access,” in the Virtuoso Design Environment SKILL Reference.

vdrCheckVoltageLabels

vdrCheckVoltageLabels(
d_cellviewID
[ t_reportFilename ]
[ g_enablePopup ]
)
=> t / nil

Description

Verifies that all top-level nets in the specified layout cellview are correctly labeled on the canvas.

Arguments

d_cellviewID

Database ID of the layout cellview in which labels are to be checked.

t_reportFilename

Name of the report file to which information about missing or incorrect labels is appended.

Enclose the filename in double quotes. If you do not specify a filename, the information is printed to the CIW instead.

g_enablePopup

Displays the messages issued by the command in a pop-up window when the command is run (the default).

When set to nil, no pop-up window appears and the messages are printed to the CIW instead.

Value Returned

t

All the top-level nets in the design are correctly labeled on the canvas.

nil

Some of the top-level nets in the design do not have correct labels. Check the report file or CIW for details.

Example

returnVal = true
when(window = hiGetCurrentWindow()
  when(cellView = geGetEditCellView(window)
    when(instHeaders = cellView~>instHeaders
       if(vdrCheckVoltageLabels(instHeader~>master "vdrReport.log" nil) == nil)
         returnVal = nil
       )
    )
  )
)

Checks that all the top-level nets in the current design are correctly labeled on the canvas and appends information to a file called vdrReport.log in the current working directory.

Related Topics

Checking Voltage Labels in the Layout View

vdrCreateUserdvConstraintsFromFile

vdrCreateUserdvConstraintsFromFile(
t_libName
t_cellName
t_viewName
t_fileName
)
=> nil

Description

Creates User Delta Voltage (userdv) constraints in the specified source schematic cellview based on information from the given CSV file. The schematic view is opened in read-only mode.

Arguments

t_libName

Name of the library in which the schematic cellview resides.

t_cellName

Name of the schematic cell in which constraints are to be created.

t_viewName

Name of the view in which userdv constraints are to be created.

t_fileName

Name of the CSV file specifying the userdv constraints to be created.

Value Returned

None

Example

Creates the userdv constraint specified in file Data.csv in cellview lib1/cell1/schematic and writes appropriate messages to the log file.

scv = dbOpenCellViewByType("lib1" "cell1" "schematic" "" "r")
srcCache = ciCacheGet(scv) ;gives constraint cache of cellview
listOfCons = nil
foreach(elm srcCache~>constraints 
          when(elm~>type == 'deltaVoltage listOfCons = cons(elm listOfCons)))
printf("LOG: Constraints in target layout: %L\n" listOfCons~>name)     
output => LOG: Constraints in target layout: nil
vdrCreateUserdvConstraintsFromFile("lib1" "cell1" "schematic" "./Data.csv")
output => 
INFO (CMGR-5020): Created constraint of type 'deltaVoltage' in cache 'lib1 cell1 schematic' with name 'Constr_1'.
INFO (CMGR-5020): Created constraint of type 'deltaVoltage' in cache 'lib1 cell1 schematic' with name 'Constr_2'
srcCache = ciCacheGet(scv)
listOfCons = nil
foreach(elm srcCache~>constraints
          when(elm~>type == 'deltaVoltage listOfCons = cons(elm listOfCons)))
printf("LOG: Constraints in target layout: %L\n" listOfCons~>name) 
output=> LOG: Constraints in target layout: ("Constr_2" "Constr_1")

vdrCreateVoltageLabel

vdrCreateVoltageLabel(
d_cellviewID
lt_datasetName
t_lowVPurposeName
t_highVPurposeName
[ f_labelHeight ]
[ g_externalNets ]
[ g_internalNets ]
[ g_update ]
[ g_generateLabels ]
[ g_overrideMode ]
[ x_hierStopLevel ]
[ u_customFunc ]
[ u_postLabelCreationCB ]
[ t_voltageInfoFile ]
[ t_layerPurposeFile ]
[ g_verbose ]
[ t_logFile ]
[ g_propagateNetVoltages ]
[ lt_sourceName ]
[ g_schematicCSV ]
)
=> t / nil

Description

Creates labels on the nets in a layout design reflecting the minimum and maximum voltages from simulation data or a specified list of sources. Labels can also be generated for nets on which no geometry exists if the vdrZeroShapeNets environment variable is set to t.

The same functionality is provided by the vdrCreateVoltageLabelEx API, which features keyed optional arguments for added convenience.

Arguments

d_cellviewID

Database ID of the layout cellview for which labels are to be created.

lt_datasetName

One or more strings representing the names of the simulation datasets that contain the minimum and maximum voltage data for the nets in the specified design.

To specify a single dataset name, use this format:
"voltages_0"

To specify more than one dataset name, use this format:
("voltages_0" "voltages_1" "voltages_2")

t_lowVPurposeName

Name of the layer purpose on which to draw minimum voltage labels. This argument is mandatory; the function does not consider the setting of the vdrLowVoltagePurpose environment variable.

t_highVPurposeName

  

Name of the layer purpose on which to draw maximum voltage labels. This argument is mandatory; the function does not consider the setting of the vdrHighVoltagePurpose environment variable.

f_labelHeight

Height of the labels created.

The default is 0.0 microns, which means that the label is automatically sized to match the height of the shape with which it is associated.

g_externalNets

Creates labels for external nets, that is, nets that are connected to the terminals of the cellview to which they belong.

The default is t. To create labels only for internal nets, specify nil for this argument.

g_internalNets

Creates labels for internal nets.

The default is t. To create labels only for external nets, specify nil for this argument.

g_update

Runs label creation in Update mode.

The default is nil, which means that label creation runs in Replace mode.

g_generateLabels

Specifies whether labels are to be created on the canvas or not.

The default is t.

Use in conjunction with the propagateNetVoltages option to control whether only net properties, only labels, both properties and labels, or neither properties nor labels are updated.

g_overrideMode

Specifies that any manually entered voltage values on nets are to be overridden by the values from the simulation datasets.

The default is nil, which means that manually entered values are not overridden.

x_hierStopLevel

Number of hierarchy levels the software searches to find the nets on which to create labels. For example:

  • 0 means that labels are created only for top-level nets (this is the default)
  • 1 means top-level nets and nets located one level below in the hierarchy
  • 2 means top-level nets and nets located one and two levels below in the hierarchy

The default is 32.

u_customFunc

User-defined SKILL procedure that can be called to create or instantiate objects other than regular text labels.

The default is nil, which means that no custom SKILL function is specified.

u_postLabelCreationCB

User-defined SKILL procedure that can be used to perform any required post-processing tasks on the created labels.

The default is nil, which means that no user-defined post-processing is performed.

For more information, see Post-Processing Voltage Labels and Markers.

t_voltageInfoFile

Specifies the name of a comma-separated value (CSV) file containing voltage information, which can be used as an input for the VDR flow instead of a simulation dataset. The CSV file specifies net names and corresponding minimum and maximum voltage values. The asterisk (*) is supported as a wildcard character. The default is nil.

For more information, see Generating Voltage Labels from a Voltage Information File.

t_layerPurposeFile

Special layer purpose file that lets you override the default t_highVPurposeName and t_lowVPurposeName arguments when a process requires it.

The default is nil.

See Specifying Layers and Purposes for Generic Voltage Labels for more information.

g_verbose

Enables verbose mode when generating labels based on a voltage information file. The software prints one message per entry in the file confirming the action taken for that entry.

The default is nil, which means that no messages are issued. When set to t, messages are printed in the CIW. Use t_logFile to save the messages to a separate log file.

The creation of voltage labels in non-verbose mode is faster than that in verbose mode.

t_logFile

Name of a log file in which messages are saved when generating labels from a voltage information file in verbose mode.

g_propagateNetVoltages

Specifies whether the voltage values are to be updated for the specified nets in the database. The default is t.

Use in conjunction with the generateLabel argument to control whether only properties, only labels, both properties and labels, or neither properties nor labels are updated.

lt_sourceName

Specifies a list of alternative sources from which voltages values are read and the order in which they are considered. Along with view names, the list may also reference a voltage information file specified by the voltageInfoFile argument. For example:

?source list("csv" "schematic" "layout")
?dataFile "csv")

The list of sources is considered only if you have not specified datasets as the source of voltage values. If no dataset, data file, or source list is specified, the voltages in the layout view are used to create labels.

g_schematicCSV

Specifies whether net names in the CSV file are assumed to be in the schematic or layout name space.

The default is nil, which means that net names are assumed to be in the layout name space. When set to t, net names are assumed to be in the schematic name space.

Value Returned

t

Labels were created with no errors.

nil

Labels could not be created due to errors.

Example

vdrCreateVoltageLabel(geGetEditCellView() "voltages_0" "drawing" "drawing" 0.0 t nil nil t nil 0 nil '_myPostVdrCB)

Runs label creation in Replace mode for only the top-level nets in the current cellview. Voltage values are taken from a dataset called voltages_0, and labels are drawn on layer purpose drawing. The code then automatically executes a user-defined callback named _myPostVdrCB to perform some post-processing tasks.

vdrCreateVoltageLabel(geGetEditCellView() nil "drawing" "drawing" 0.0 t nil nil t nil 0 nil '_myPostVdrCB "./voltages.csv")

Performs the same operation as above but uses the information in the file called voltages.csv instead of datasets as input.

vdrCreateVoltageLabel(geGetEditCellView() nil "drawing" "drawing" 0.0 t nil nil t nil 0 nil '_myPostVdrCB "./voltages.csv")
INFO (VDR-2001): VDR annotation deleted 12 voltage labels.
INFO (VDR-2004): VDR annotation created 12 voltage labels.
INFO (VDR-2005): VDR annotation updated 0 voltage labels.

Related Topics

Generating Voltage Labels from Simulation Data for All Nets

Generating Voltage Labels from a Voltage Information File

vdrCreateVoltageLabelEx

vdrCreateVoltageLabelEx(
d_cellviewID
lt_datasetName
t_lowVPurposeName
t_highVPurposeName
[ ?labelHeight f_labelHeight ]
[ ?externalNet { t | nil } ]
[ ?internalNet { t | nil } ]
[ ?update { t | nil } ]
[ ?generateLabel { t | nil } ]
[ ?overrideMode { t | nil } ]
[ ?hierStopLevel x_hierStopLevel ]
[ ?customFunc u_customFunc ]
[ ?postLabelCreationCB u_postLabelCreationCB ]
[ ?dataFile t_voltageInfoFile ]
[ ?lppFile t_layerPurposeFile ]
[ ?verbose { t | nil } ]
[ ?logFile t_logFile ]
[ ?propagateNetVoltages { t | nil } ]
[ ?source lt_sourceName ]
[ ?schematicCSV { t | nil } ]
)
=> t / nil

Description

Creates labels on the nets in a layout design reflecting the minimum and maximum voltages from simulation data or a specified list of sources. Labels can also be generated for nets on which no geometry exists if the vdrZeroShapeNets environment variable is set to t.

Arguments

d_cellviewID

Database ID of the layout cellview for which labels are to be created.

lt_datasetName

One or more strings representing the names of the simulation datasets that contain the minimum and maximum voltage data for the nets in the specified design.

To specify a single dataset name, use this format:
"voltages_0"

To specify more than one dataset name, use this format:
("voltages_0" "voltages_1" "voltages_2")

t_lowVPurposeName

Name of the layer purpose on which to draw minimum voltage labels. This argument is mandatory; the function does not consider the setting of the vdrLowVoltagePurpose environment variable.

t_highVPurposeName

  

Name of the layer purpose on which to draw maximum voltage labels. This argument is mandatory; the function does not consider the setting of the vdrHighVoltagePurpose environment variable.

?labelHeight f_labelHeight

Height of the labels created.

The default is 0.0 microns, which means that the label is automatically sized to match the height of the shape with which it is associated.

?externalNet { t | nil }

Creates labels for external nets, that is, nets that are connected to the terminals of the cellview to which they belong.

The default is t. To create labels only for internal nets, specify nil for this argument.

?internalNet { t | nil }

  

Creates labels for internal nets.

The default is t. To create labels only for external nets, specify nil for this argument.

?update { t | nil }

  

Runs label creation in Update mode.

The default is nil, which means that label creation runs in Replace mode.

?generateLabel { t | nil }

  

Specifies whether labels are to be created on the canvas or not.

The default is t.

Use in conjunction with the ?propagateNetVoltages option to control whether only net properties, only labels, both properties and labels, or neither properties nor labels are updated.

?overrideMode { t | nil }

  

Specifies that any manually entered voltage values on nets are to be overridden by the values from the simulation datasets.

The default is nil, which means that manually entered values are not overridden.

?hierStopLevel x_hierStopLevel

  

Number of hierarchy levels the software searches to find the nets on which to create labels. For example:

  • 0 means that labels are created only for top-level nets (this is the default)
  • 1 means top-level nets and nets located one level below in the hierarchy
  • 2 means top-level nets and nets located one and two levels below in the hierarchy

The default is 32.

?customFunc u_customFunc

User-defined SKILL procedure that can be called to create or instantiate objects other than regular text labels.

The default is nil, which means that no custom SKILL function is specified.

?postLabelCreationCB u_postLabelCreationCB

User-defined SKILL procedure used to perform any required post-processing tasks on the created labels. The default is nil, which means that no post-processing is performed. For more information, see Post-Processing Voltage Labels and Markers.

?dataFile t_voltageInfoFile

Specifies the name of a comma-separated value (CSV) file containing voltage information, which can be used as an input for the VDR flow instead of a simulation dataset. The CSV file specifies net names and corresponding minimum and maximum voltage values. The asterisk (*) is supported as a wildcard character.

The default is nil.

For more information, see Generating Voltage Labels from a Voltage Information File.

?lppFile t_layerPurposeFile

Special layer purpose file that lets you override the default t_highVPurposeName and t_lowVPurposeName arguments when your process requires it.

The default is nil.

See Specifying Layers and Purposes for Generic Voltage Labels for more information.

?verbose { t | nil }

  

Enables verbose mode when generating labels based on a voltage information file. The software prints one message per entry in the file confirming the action taken for that entry.

The default is nil, which means no messages are issued. When set to t, messages are printed in the CIW. Use t_logFile to save the messages to a separate log file.

?logFile t_logFile

Name of a log file in which messages are saved when generating labels from a voltage information file in verbose mode.

?propagateNetVoltages { t | nil }

Specifies whether the voltage values are to be updated for the specified nets in the database. The default is t.

Use in conjunction with the ?generateLabel option to control whether only net properties, only labels, both properties and labels, or neither properties nor labels are updated.

?source lt_sourceName

Specifies a list of alternative sources from which voltages values are read and the order in which they are considered. Along with view names, the list may also reference a voltage information file specified by the ?dataFile argument. For example:

?source list("csv" "schematic" "layout")
?dataFile "voltageInfoFile.csv"

The list of sources is considered only if you have not specified datasets as the source of voltage values. If no dataset, data file, or source list is specified, the voltages in the layout view are used to create labels.

?schematicCSV { t | nil }

Specifies whether net names in the CSV file are assumed to be in the schematic or layout name space.

The default is nil, which means that net names are assumed to be in the layout name space. When set to t, net names are assumed to be in the schematic name space.

Value Returned

t

Labels were created with no errors.

nil

Labels could not be created due to errors.

Examples

cv = geGetEditCellView()
=> db:0x2675871a
vdrCreateVoltageLabelEx(cv "voltages_0" "drawing" "drawing" ?internalNet nil ?hierStopLevel 0)
=> t

Creates labels from the voltage values from dataset voltages_0 for the top-level external nets in Replace mode.

Related Topics

Generating Voltage Labels from Simulation Data for All Nets

Generating Voltage Labels from a Voltage Information File

vdrCreateVoltageLabelOnNets

vdrCreateVoltageLabelOnNets(
d_cellviewID
ld_netIDs
t_lowVPurposeName
t_highVPurposeName
[ f_labelHeight ]
[ u_customFunc ]
[ lt_ignoreZeroVoltNets ]
[ u_postLabelCreationCB ]
[ t_layerPurposeFile ]
)
=> t / nil

Description

Creates labels from the voltage values entered manually in the Property Editor assistant for the specified top-level nets in the given cellview. The labels are created on the geometry of the net in question. Where there is no geometry, the labels are created on all the Pcell and instance terminals connected to the net. The command works only in Layout XL and higher tiers.

Arguments

d_cellviewID

Database ID of the layout cellview containing the nets for which labels are to be created.

ld_netIDs

List of database IDs identifying the nets for which labels are to be created.

t_lowVPurposeName

Name of the layer purpose on which to draw minimum voltage labels. This argument is mandatory; the function does not consider the setting of the vdrLowVoltagePurpose environment variable.

t_highVPurposeName

  

Name of the layer purpose on which to draw maximum voltage labels. This argument is mandatory; the function does not consider the setting of the vdrHighVoltagePurpose environment variable.

f_labelHeight

Height of the labels created.

The default is 0.0 microns, which means that the label is automatically sized to match the height of the shape with which it is associated.

u_customFunc

User-defined SKILL procedure that can be called to create or instantiate objects other than regular text labels.

The default is nil, which means that no custom SKILL function is specified.

lt_ignoreZeroVoltNets

List of nets that have voltage values of (0,0) but for which labels should be created anyway.

Names must each be enclosed in double quotes and separated by a space. The asterisk (*) is supported as a wildcard character.

t_layerPurposeFile

Special layer purpose file that lets you override the default t_highVPurposeName and t_lowVPurposeName arguments when your process requires it.

See Specifying Layers and Purposes for Generic Voltage Labels for more information.

Value Returned

t

Label creation ran without any errors.

nil

Label creation encountered errors.

Example

vdrCreateVoltageLabelOnNets(geGetEditCellView() netIDs "vlo" "vhi" 0.2)
t

Creates labels for the list of netIDs in the currently edited cellview. The labels are 0.2 microns high with the minimum voltage label drawn on layer purpose vlo and the maximum voltage label on purpose vhi.

Related Topics

Generating Voltage Labels for Manually Entered Voltages

vdrCreateVoltageMarkers

vdrCreateVoltageMarkers(
d_cellviewID
t_voltagePurposeFile
[ ?dataset t_datasetName ]
[ ?update { t | nil } ]
[ ?override_mode { t | nil } ]
[ ?size f_markerHeight ]
[ ?externalNet { t | nil } ]
[ ?internalNet { t | nil } ]
[ ?hierStopLevel x_hierStopLevel ]
[ ?postMarkerCreationCB u_postMarkerCreationCB ]
[ ?csvFile t_voltageInfoFile ]
[ ?voltageRounding { roundOff | floor | ceiling } ]
[ ?mode { maxVoltage | minVoltage | bothVoltage } ]
)
=> t / nil

Description

Creates markers for minimum and/or maximum voltages on the nets in the specified design. Voltage information can be taken from simulation datasets, from user-defined voltages on nets, or from a voltage information file. The voltage purpose file specifies on which layer-purpose pair a marker is created depending on the voltage value in question.

Arguments

d_cellviewID

Database ID of the layout cellview containing the nets for which markers are to be created.

t_voltagePurposeFile

Lists the layer-purpose pairs on which markers for different voltage values are to be created.

?dataset lt_datasetName

  

One or more strings representing the names of the simulation datasets containing minimum and maximum voltage data for the nets in the specified design.

For example, to specify a single dataset name, use this format: "voltages_0". To specify more than one dataset name, type ("voltages_0" "voltages_1" "voltages_2")

?update { t | nil }

  

Runs marker creation in Update mode, which means that values are based on the last voltages set on net; that is

  • The lower of the current minimum and the last minimum
  • The higher of the current maximum and the last maximum

The default is nil, which means that marker creation is run in Replace mode.

?override_mode { t | nil }

Specifies that any manually entered voltage values on nets are to be overridden by the values from the simulation datasets.

The default is nil, which means that manually entered values are not overridden.

?size f_markerHeight

  

Height of the markers created.

The default is 0.0 microns, which means that no marker is created.

?externalNet { t | nil }

Creates markers for external nets; that is, nets that are connected to the terminals of the cellview to which they belong.

The default is t.

?internalNet { t | nil }

Creates markers for internal nets.

The default is t.

?hierStopLevel x_hierStopLevel

Specifies how many hierarchy levels the software searches to find the nets on which to create markers. For example, 0 means that markers are created for top-level nets only; 1 means top-level nets and nets located one level below in the hierarchy; 2 means top-level nets and nets located one and two levels below in the hierarchy; and so on. The default is 32.

?postMarkerCreationCB u_postMarkerCreationCB

Specifies a user-defined SKILL procedure that can be used to perform any required post-processing tasks on the created labels. For more information, see Post-Processing Voltage Labels and Markers.

?csvFile t_voltageInfoFile

Specifies the name of a comma-separated value (CSV) file containing voltage information, which can be used instead of a simulation dataset as an input for the VDR flow. The CSV file specifies net names and corresponding minimum and maximum voltage values. Wildcard (*) is supported.

For more information, see Generating Voltage Labels from a Voltage Information File.

?voltageRounding { "roundOff" | "floor" | "ceiling" }

Specifies the rounding rule to follow for voltage values.

  • roundOff rounds the voltage value to the nearest 0.01
  • ceiling rounds up the voltage value to the nearest 0.01
  • floor rounds down the voltage value to the nearest 0.01

The default is "roundOff".

?mode { "maxVoltage" | "minVoltage" | "bothVoltage" }

Specifies whether markers are to be created for maximum, minimum, or all voltage values.

The default is "maxVoltage".

Value Returned

t

Marker creation ran without any errors.

nil

Marker creation encountered errors.

Example

when(cellView = geGetEditCellView(window)
     voltageLPPFile = "volt_LPP.map"
     dataset = "VDR_dataset_0"
     vdrCreateVoltageMarkers(cellview voltageLPPFile ?dataset dataset 
       ?update nil ?override_mode nil ?size 0.01 ?externalNet t 
       ?internalNet nil ?hierStopLevel 3 ?postMarkerCreationCB nil 
       ?csvFile nil ?voltageRounding "floor" ?mode "bothVoltage")
    )

Creates markers for the minimum and maximum voltages on external nets in the specified dataset down to hierarchy level 3 of the specified cellview. The markers are 0.01 high. Voltage values are rounded down to the nearest 0.01.

Related Topics

Generating Voltage Markers from Simulation Data for All Nets

Specifying Layers and Purposes for Voltage Markers

vdrCreateVoltageMarkersOnNets

vdrCreateVoltageMarkersOnNets(
d_cellviewID
ld_netIDs
t_voltagePurposeFile
[ ?size f_markerHeight ]
[ ?postMarkerCreationCB t_postMarkerCreationCB ]
[ ?voltageRounding { roundOff | floor | ceiling } ]
[ ?voltageMode { maxVoltage | minVoltage | bothVoltage } ]
[ ?ignoreZeroVoltNets lt_netNames ]
)
=> t / nil

Description

Creates markers from the voltage values entered manually in the Property Editor assistant for the specified top-level nets in the given cellview.

Arguments

d_cellviewID

Database ID of the layout cellview containing the nets for which markers are to be created.

ld_netIDs

List of database IDs identifying the nets for which markers are to be created.

t_voltagePurposeFile

Lists the layer-purpose pairs on which markers for different voltage values are to be created.

?size f_markerHeight

  

Height of the markers created.

The default is 0.0 microns, which means that no marker is created.

?postMarkerCreationCB t_postMarkerCreationCB

Specifies the name of a user-defined SKILL procedure that can be used to perform any required post-processing tasks on the generated markers. For more information, see Post-Processing Voltage Labels and Markers.

?voltageRounding { "roundOff" | "floor" | "ceiling" }

Specifies the rounding rule to follow.

  • roundOff rounds the voltage value to the nearest 0.01
  • ceiling rounds up the voltage value to the nearest 0.01
  • floor rounds down the voltage value to the nearest 0.01

The default is "roundOff".

?mode { "maxVoltage" | "minVoltage" | "bothVoltage" }

Specifies whether markers are to be created for maximum, minimum, or all voltage values.

The default is "maxVoltage".

?ignoreZeroVoltNets lt_netNames

Lists the names of nets which have voltage values of (0,0) but for which markers should be created anyway.

Names must each be enclosed in double quotes and separated by a space. The asterisk (*) is supported as a wildcard character.

Value Returned

t

Marker creation ran without any errors.

nil

Marker creation encountered errors.

Example

cv = geGetEditCellView()
netIds = cv~>nets
callback = stringToSymbol("vdrMarkerCB")
vdrCreateVoltageMarkersOnNets(cv netIds "voltagePurpose.map" 
  ?size 0.01 ?voltageRounding "floor" ?voltageMode "bothVoltage" 
  ?ignoreZeroVoltNets list("AVSS" "AVDD") ?postMarkerCreationCB callback)

Creates markers for minimum and maximum voltage values for the list of netIDs in the currently edited cellview. The markers are 0.01 high and are generated for nets AVSS and AVDD even if their values are 0. Voltage values are rounded down to the nearest 0.01. The code automatically executes a user-defined callback named vdrMarkerCB to perform some post-processing tasks.

Related Topics

Generating Voltage Markers for Manually Entered Voltages

vdrCreateVSyncConstraintsFromFile

vdrCreateVSyncConstraintsFromFile(
t_libName
t_cellName
t_viewName
t_fileName
)
=> nil

Description

(ICADVM20.1 Only) Creates Voltage Synced Net (vsync) constraints in the specified source schematic cellview based on information from the given CSV file. The schematic view is opened in read-only mode.

Arguments

t_libName

Name of the library in which the schematic cellview resides.

t_cellName

Name of the schematic cell in which constraints are to be created.

t_viewName

Name of the view in which vsync constraints are to be created.

t_fileName

Name of the CSV file specifying the vsync constraints to be created.

Value Returned

None

Example

scv = dbOpenCellViewByType("lib1" "cell1" "schematic" "" "r")
srcCache = ciCacheGet(scv);gives constraint cache of cellview
listOfCons = nil
foreach(elm srcCache~>constraints 
          when(elm~>type == 'voltageSyncedNets listOfCons = cons(elm listOfCons)))
printf("LOG: Constraints in target layout: %L\n" listOfCons~>name)     
output => LOG: Constraints in target layout: nil
vdrCreateVSyncConstraintsFromFile("lib1" "cell1" "schematic" "./Data.csv")
output => 
INFO (CMGR-5020): Created constraint of type 'voltageSyncedNets' in cache 'lib1 cell1 schematic' with name 'Constr_1'.
INFO (CMGR-5020): Created constraint of type 'voltageSyncedNets' in cache 'lib1 cell1 schematic' with name 'Constr_2'
srcCache = ciCacheGet(scv)
listOfCons = nil
foreach(elm srcCache~>constraints
          when(elm~>type == 'voltageSyncedNets listOfCons = cons(elm listOfCons)))
printf("LOG: Constraints in target layout: %L\n" listOfCons~>name) 
output=> LOG: Constraints in target layout: ("Constr_2" "Constr_1")

Creates the vsync constraint specified in file Data.csv in cellview lib1/cell1/schematic and writes appropriate messages to the log file.

Related Topics

VSync Constraints Visualizer

Defining and Checking Voltage Synced Nets

vdrDebuggerGUI

vdrDebuggerGUI(
)
=> t / nil

Description

Opens the VDR Debugger form.

Arguments

None

Value Returned

t

The VDR Debugger form is displayed.

nil

Failed to open the VDR Debugger form because an error occurred.

Example

vdrDebuggerGUI()
t

Displays the VDR Debugger form.

Related Topics

VDR Debugger

vdrDeleteGUI

vdrDeleteGUI(
)
=> t / nil

Description

Opens the Delete VDR Objects form, where you can select Labels/Markers, VSync Shapes, and Userdv Shapes check boxes to delete voltage labels and markers, VSync shapes, and Userdv shapes, respectively.

Arguments

None

Value Returned

t

The Delete VDR Objects form is displayed.

nil

Failed to open the Delete VDR Objects form because an error occurred.

Example

vdrDeleteGUI()
=> t

Opens the Delete VDR Objects form.

Related Topics

VDR Debugger

vdrDeleteLabels

vdrDeleteLabels(
d_cellviewID
)
=> nil

Description

Deletes from the specified cellview all the labels and markers created using the VDR flows.

Arguments

d_cellviewID

Database ID of the top layout cellview from which labels and markers are to be deleted.

Value Returned

nil

All the VDR labels and markers in the cellview were deleted.

Example

vdrDeleteLabels(topCvId)

Deletes all the VDR labels and markers in the cellview with the given database ID.

Related Topics

Deleting Voltage Labels and Markers

vdrDisplaySchematicGUI

vdrDisplaySchematicGUI(
)
=> t / nil

Description

Opens the Voltage Dependent Rules form, which you can use to transfer voltage data on schematic nets from the specified simulation voltage datasets. This function works only in Layout XL and higher tiers.

Arguments

None

Value Returned

t

The Voltage Dependent Rules form opens.

nil

The form cannot be opened, possibly because you are not suing Layout XL.

Examples

The following example opens the Voltage Dependent Rules form.

vdrDisplaySchematicGUI()
=> t

Related Topics

Generating Voltage Labels from Simulation Data for All Nets

Voltage Dependent Rules

vdrGenerateLabelsGUI

vdrGenerateLabelsGUI(
)
=> t / nil

Description

Opens the Voltage Dependent Rules form, which you can use to create voltage labels or markers on nets. The command works only in Layout XL and higher tiers.

Arguments

None

Value Returned

t

The form was opened.

nil

The form could not be opened, possibly because you are not using Layout XL.

Example

vdrGenerateLabelsGUI()
=> t

Opens the Voltage Dependent Rules form.

Related Topics

Generating Voltage Labels from Simulation Data for All Nets

Generating Voltage Markers from Simulation Data for All Nets

vdrGenerateUserdvShapes

vdrGenerateUserdvShapes(
d_cellviewID
[ ?verbose { t | nil } ]
[ ?logFile t_logFile ]
)
=> t / nil

Description

(ICADVM20.1 EXL Only) Creates User Delta Voltage (Userdv) shapes between nets that are constrained by a User Delta Voltage constraint. The Userdv marker shape and associated text label that are created correspond to each User Delta Voltage constraint. You can optionally print messages relating to problems encountered during Userdv shape creation and save these messages to a specified log file if required.

Arguments

d_cellviewID

Database ID of the layout cellview in which the Userdv shapes are to be created.

?verbose { t | nil }

  

Creates verbose reports displaying debug messages during Userdv shape creation. The reports include reasons for unsuccessful attempts to create Userdv shapes.

The default is nil, which means that no messages are issued. When set to t, messages are printed in the CIW. Use t_logFile to save the messages to a separate log file.

The creation of Userdv shapes in non-verbose mode is faster than that in verbose mode.

?logFile t_logFile

Name of the debug message log file.

Value Returned

t

Userdv shapes were created.

nil

Userdv shapes could not be created.

Examples

vdrGenerateUserdvShapes(cv)

Generates a Userdv marker shape and associated text label corresponding to each User Delta Voltage constraint in the given cellview.

vdrGenerateUserdvShapes(cv ?verbose t ?logFile "userdv.log")

Generates Userdv marker shapes and prints messages relating to problems encountered during the creation. Those messages are saved in a file called "userdv.log".

Related Topics

VDR Debugger

vdrGenerateVSyncShapes

vdrGenerateVSyncShapes(
d_cellviewID
[ ?verbose { t | nil } ]
[ ?logFile t_logFile ]
)
=> t / nil

Description

(ICADVM20.1 EXL Only) Creates voltage sync (vsync) shapes between nets that are constrained by a common voltage sync constraint. You can optionally print messages relating to problems encountered during vsync shape creation and save these messages to a specified log file if required.

Arguments

d_cellviewID

Database ID of the layout cellview in which the vsync shapes are to be created.

?verbose { t | nil }

  

Create verbose reports displaying debug messages during vsync shape creation. The reports include reasons for unsuccessful attempts to create vsync shapes.

The default is nil, which means that no messages are issued. When set to t, messages are printed in the CIW. Use t_logFile to save the messages to a separate log file.

Creation of vsync shapes in non-verbose mode is faster than that in verbose mode.

?logFile t_logFile

Debug message log file.

Value Returned

t

The vsync shapes were created.

nil

The vsync shapes could not be created.

Example

when(window = hiGetCurrentWindow()
  when(cellview = geGetEditCellView(window)
   vdrGenerateVSyncShapes(cellview ?verbose ?logFile "vsyncLog.txt")
  )
)

Generates vsync shapes for the cellview being edited in the current session and creates a verbose report with name vsyncLog.txt.

Related Topics

Defining and Checking Voltage Synced Nets

vdrGetValidLayers

vdrGetValidLayers(
)
=> l_layers / nil

Description

Returns the list of valid layers on which labels or markers can be generated. The list was specified previously using the vdrSetValidLayers function.

Arguments

None

Value Returned

l_layers

List of layer names.

nil

No layer names have been registered.

Example

cv = geGetEditCellView()
if(cv then
    layers = list("Metal1" "Metal2" "Poly")
    vdrSetValidLayers(cv layers)
)

vdrGetValidLayers()
>("Metal1" "Metal2" "Poly")

Returns the list of layer names registered using the vdrSetValidLayers command.

Related Topics

vdrSetValidLayers

vdrValidLayersList

Specifying Layers and Purposes for Generic Voltage Labels

vdrResetNetVoltages

vdrResetNetVoltages(
d_cellviewID
[ ?hierDepth x_hierDepth ]
)
=> t / nil

Description

Resets the minimum and maximum voltage values and voltage range source for all nets to zero in the specified layout or schematic view.

Arguments

d_cellviewID

ID of the layout or the schematic view.

?hierDepth x_hierDepth

Specifies the hierarchy levels.

Default value is 0, which indicates that voltage values are reset only for top-level nets.

You can specify any integer value from 0–32.

Value Returned

t

Net voltages are reset successfully.

nil

Net voltages cannot be reset because of an error.

Examples

The following example resets the top-level net voltages in the specified layout cellview.

cvID=dbOpenCellViewByType("vdr_demo" "inverter_chain" "layout")
;Opens the specified layout cellview.
vdrResetNetVoltages(cvID)
;Resets the top-level net voltages in the currently open layout cellview.
=> db:0x2bb8e89a
=> t

The following example resets voltage values for the nets up to two levels down from the top level.

cvID=dbOpenCellViewByType("vdr_demo" "inverter_chain" "layout")
;Opens the specified layout cellview.
vdrResetNetVoltages(cvID ?hierDepth 2)
;Resets the voltage values for the top-level nets and nets located one and two levels below the hierarchy.
=> db:0x2bb8e89a
=> t

vdrRunSanityChecker

vdrRunSanityChecker(
d_cellviewID
[ g_checkMarkers ]
[ g_checkAgainstLayout ]
[ f_tolerance ]
[ g_isToleranceAbsolute ]
[ t_logFile ]
[ t_csvName ]
[ l_datasets ]
[ t_checkAgainstSource ]
[ g_completeHierarchy ]
)
=> t / nil

Description

Checks constrained voltage labels in the layout against the voltage values stored in the schematic or layout net properties and reports any discrepancies between the values. You can optionally apply a threshold up to which mismatches are tolerated and not reported. You can also specify the location and name of a log file in which the report is captured.

Arguments

d_cellviewID

Database ID of the layout cellview in which labels and markers are to be checked.

g_checkMarkers

Specifies whether to check markers (t) or labels (nil) in the layout.

Environment variable: vdrSanityCheckerObjectType

g_checkAgainstLayout

Specifies whether to check the voltage values in labels or markers against layout net properties (t) or schematic net properties (nil).

Environment variable: vdrSanityCheckerCheckAgainst

f_tolerance

Threshold beyond which mismatches are to be reported.

Environment variable: vdrSanityCheckerTolerance

g_isToleranceAbsolute

Specifies whether the tolerance value is considered an absolute value (t) or a relative percentage based on the net voltage (nil).

Environment variable: vdrSanityCheckerToleranceType

t_logFile

Path and name of a log file in which the discrepancy report is to be captured.

When you specify a log filename, only a summary message is printed in the CIW. If you do not specify a log filename, discrepancies are reported in a table printed in the CIW.

Environment variable: vdrSanityCheckerLogFile

t_csvName

Specifies the path and name of the CSV file containing voltage values against which labels are checked.

This argument is considered only when the argument t_checkAgainstSource is set to CSV.

Environment Variable: vdrSanityCheckerCsvFileName

l_datasets

Specifies a list of space-separated datasets against which labels are checked.

This argument is considered only when the argument t_checkAgainstSource is set to Datasets.

Environment Variable: vdrSanityCheckerDatasets

t_checkAgainstSource

Specifies whether voltage values in labels are checked against schematic net properties, layout net properties, a CSV file, or specified datasets.

Valid values are: Schematic, Layout, CSV, and Datasets.

The default value is Schematic.

Environment Variable: vdrSanityCheckerCheckAgainst

g_completeHierarchy

Specifies whether to perform sanity checks on the complete hierarchy.

Valid values are t and nil.

The default value is nil.

Environment Variable: vdrSanityCheckerCompleteHierarchy

Value Returned

t

The comparison report was generated.

nil

The sanity check could not be run.

Example

The following example checks the voltage labels in the currently edited layout cellview against the values stored in the layout net properties and captures the report in a file called vdrReport.log. Only discrepancies of more than 0.04V are reported.

checkMarkers = nil
checkAgainstLayout = t
tolerance = 0.04
isToleranceAbsolute = t
logFile = "vdrReport.log"
csvName = nil
datasets = "VDR_dataset_0 VDR_dataset_1"
checkAgainstSource = "Datasets"
completeHierarchy = t
when(window = hiGetCurrentWindow()
  when(cellView = geGetEditCellView(window)
     vdrRunSanityChecker(cellView checkMarkers checkAgainstLayout tolerance
     isToleranceAbsolute logFile csvName datasets checkAgainstSource             completeHierarchy)
   )
)
=> t

The following example checks the voltage labels in the currently edited layout cellview against the values stored in the myCSV.csv file and captures the report in a file vdrReportCSV.log. Only discrepancies of more than 0.3V are reported.

checkMarkers = nil
checkAgainstLayout = nil
tolerance = 0.3
isToleranceAbsolute = t
logFile = "vdrReportCSV.log"
csvName = "home/user/myCSV.csv"
datasets = ""
checkAgainstSource = "CSV"
completeHierarchy = nil
when(window = hiGetCurrentWindow()
  when(cellView = geGetEditCellView(window)
     vdrRunSanityChecker(cellView checkMarkers checkAgainstLayout tolerance
     isToleranceAbsolute logFile csvName datasets checkAgainstSource             completeHierarchy)
   )
)
=> t

Related Topics

Sanity Checking Voltage Values in Constrained Labels

vdrRunUserdvSanityChecker

vdrRunUserdvSanityChecker(
d_cellviewID
[ t_logFile ]
)
=> t / nil

Description

(ICADVM20.1 EXL Only) Checks whether there are valid User Delta Voltage (Userdv) shapes on nets that are constrained by a common Userdv constraint. The checker reports any Userdv shapes that are wrongly created and any nets that have a Userdv constraint defined but no Userdv shape between them.

Arguments

d_cellviewID

Database ID of the layout cellview to be checked.

t_logFile

Path and name of a log file in which the report is to be captured.

When you specify a log filename, only a summary message is printed in the CIW. If you do not specify a log filename, discrepancies are reported in a table printed in the CIW.

Environment variable: vdrSanityCheckerLogFile

Value Returned

t

The sanity checks on the userdv shapes are run successfully.

nil

The sanity checks on the userdv shapes cannot be run because of an error.

Examples

The following example runs Sanity Checker on the Userdv shapes in the currently edited layout cellview and saves the report in the log file userdvCoherenceReport.log.

window=hiGetCurrentWindow()
;Return the ID of the current window.
cellView=geGetWindowCellView(window)
;Returns the database ID of the cellview displayed in the current window.
scv = dbOpenCellViewByType("vdr_demo" "inverter_chain" "layout" "" "r")
;Opens the specified library cellview in read-only mode
srcCache = ciCacheGet(scv) ;Gives constraint cache of cellview
listOfCons = nil
foreach(elm srcCache~>constraints 
          when(elm~>type == 'deltaVoltage listOfCons = cons(elm listOfCons)))
printf("LOG: Constraints in target layout: %L\n" listOfCons~>name)     
output => LOG: Constraints in target layout: nil
vdrCreateUserdvConstraintsFromFile("vdr_demo" "inverter_chain" "layout" "./myuserdvData.csv")
vdrGenerateUserdvShapes(
      scv
      ?verbose t
      ?logFile "./userdvLogFile"
      )
;Creates userdv shapes between nets constrainted by userdv constraints
vdrRunUserdvSanityChecker(
       cellView
       "./userdvCoherenceReport.log"
       )
; Runs Sanity Checker on the userdv shapes created in the specified cellview.
=> window:2
=> db:0x2c3deb1a
=> db:0x2c3deb1a
=> ci:0x3b00a3f0
=> nil
=> nil
=> 
LOG: Constraints in target layout: nil
=> t
=>  
INFO (CMGR-5020): Created constraint of type 'deltaVoltage' in cache 'vdr_demo inverter_chain layout' with name 'Constr_0'.
INFO (CMGR-5020): Created constraint of type 'deltaVoltage' in cache 'vdr_demo inverter_chain layout' with name 'Constr_3'.
=> t
=> 
INFO (VDR-2011): VDR annotation deleted 0 Userdv Shapes.
INFO (VDR-2000): Successfully created Userdv Shape between 'E' and 'F' on ('Metal1' 'vsync') for voltage 0.4 and bBox ((1.164 0.0415) (1.244 0.4845)).
INFO (VDR-2000): Successfully created Userdv Shape between 'A' and 'B' on ('Metal1' 'vsync') for voltage 0.4 and bBox ((1.734 0.0415) (1.814 0.4845)).
INFO (VDR-2012): VDR annotation created 2 Userdv Shapes.
=> t
=> 
INFO (VDR-2010): All the Userdv nets in the cellview 'vdr_demo/inverter_chain/layout' are correctly marked with the Userdv shapes.
=> t

Related Topics

Sanity Checking Voltage Values in Constrained Labels

vdrRunVoltageConflictChecker

vdrRunVoltageConflictChecker(
d_cellviewID
[ ?hierDepth x_hierDepth ]
[ ?precision x_precision ]
[ ?tolerance n_tolerance ]
[ ?toleranceType t_toleranceType ]
[ ?reportFile t_reportFile ]
[ ?skipZeroVoltageNets g_skipZeroVoltageNets ]
[ ?fixConflict g_fixConflict ]
)
=> t / nil

Description

Checks voltage conflicts between top-level and hierarchical nets on the specified layout or schematic cellview. Conflict report is printed in the CIW and also saved in the file conflict.rpt by default.

Arguments

d_cellviewID

ID of the layout or schematic cellview.

?hierDepth x_hierDepth

Hierarchy level upto which conflicts are to be reported.

Default value is 0, which indicates that conflicts are reported only for top-level nets.

You can specify any integer value between 0–32.

?precision x_precision

Specifies the precision value.

Default value is 2.

?tolerance n_tolerance

Threshold beyond which voltage conflicts are to be reported.

Default tolerance value is 0.0.

?toleranceType t_toleranceType

Specifies whether the tolerance value is to be considered as an absolute value or a relative percentage based on the net voltage.

Default value is Absolute.

Valid values are: Absolute and Relative.

?reportFile t_reportFile

Name of the report file in which conflicts are to be printed.

The default value is conflict.rpt.

?skipZeroVoltageNets g_skipZeroVoltageNets

Specifies whether to skip reporting conflicts for zero-voltage hierarchical nets.

The default value is t, which indicates that conflicts for zero-voltage hierarchical nets are not reported.

?fixConflict g_fixConflict

Specifies whether to fix the reported conflicts.

The default value is nil, which indicates that voltages for lower-level nets are reset, but are retained for top-level nets

Value Returned

t

Voltage conflicts between top-level and hierarchical nets are successfully reported.

nil

Voltage conflicts cannot be reported because of an error.

Examples

Opens the specified layout cellview.

cvID=dbOpenCellViewByType("vdr_demo" "inverter_chain" "layout")

Runs conflict checker for hierarchical nets upto level 32.

vdrRunVoltageConflictChecker(cvID ?hierDepth 32)
=> t

Runs conflict checker for hierarchical nets upto level 32 and logs the report in the file myreport.rpt.

vdrRunVoltageConflictChecker(cvID ?hierDepth 32 ?reportFile "myreport.rpt")
=> t

Runs conflict checker for hierarchical nets upto level 32 and fixes those conflicts. (Resets hierarchical nets voltages to zero.)

vdrRunVoltageConflictChecker(cvID ?hierDepth 32 ?fixConflict t)
=> t

Reports conflicts for zero-voltage hierarchical nets.

vdrRunVoltageConflictChecker(cvID ?hierDepth 32 ?skipZeroVoltageNets nil)
=> t

vdrRunVSyncSanityChecker

vdrRunVSyncSanityChecker(
d_cellviewID
[ t_logFile ]
)
=> t / nil

Description

(ICADVM20.1 EXL Only) Checks whether there are valid voltage sync (vsync) shapes on nets that are constrained by a common vsync constraint. The checker reports any vsync shapes that are wrongly created and any nets that have a vsync constraint defined but no vsync shape between them.

Arguments

d_cellviewID

Database ID of the layout cellview to be checked.

t_logFile

Path and name of a log file in which the report is to be captured.

When you specify a log filename, only a summary message is printed in the CIW. If you do not specify a log filename, discrepancies are reported in a table printed in the CIW.

Environment variable: vdrSanityCheckerLogFile

Value Returned

t

The sanity check was completed.

nil

The sanity check could not be run.

Example

when(window = hiGetCurrentWindow()
  when(cellView = geGetEditCellView(window)
    logFile = "report.log"
    vdrRunVSyncSanityChecker(cellView logFile)
  )
)

Checks vsync shapes in the currently edited layout cellview and saves the report in a file called report.log.

Related Topics

Sanity Checking Voltage Values in Constrained Labels

Defining and Checking Voltage Synced Nets

vdrSanityCheckerGUI

vdrSanityCheckerGUI(
d_windowID)
=> t / nil

Description

Opens the VDR Sanity Checker form, which you can use to check constrained VDR voltage labels in the layout view and report any labels that are missing or which have values different from the values specified for the net in the schematic or layout design.

Arguments

d_windowID

ID of the layout window for which you want to open the VDR Sanity Checker form.

Value Returned

t

The VDR Sanity Checker form is displayed.

nil

The VDR Sanity Checker form cannot be displayed because of an error.

Examples

The following example opens the VDR Sanity Checker form for the specified layout window.

window=hiGetCurrentWindow()
;Returns the ID of the current window.
vdrSanityCheckerGUI(window)
;Opens the VDR Sanity Checker form for the specified layout window.
=> window:4
=> t

Related Topics

VDR Debugger

Sanity Checking Voltage Values in Constrained Labels

Defining and Checking Voltage Synced Nets

vdrSetNetVoltageRange

vdrSetNetVoltageRange(
t_libName
t_cellName
l_viewList
[ ?netVoltages l_netVoltages ]
[ ?voltageDataFile t_voltageInfoFile ]
[ ?verbose { t | nil } ]
[ ?logFile t_logFile ]
)
=> t / nil

Description

(ICADVM20.1 Only) Sets net voltages in the specified list of cellviews. The voltages can be either specified directly as a list when the command is called or read from voltage information file.

Arguments

t_libName

  

Name of the library in which the cellviews to be updated reside.

t_cellName

  

Name of the cell whose views are to be updated.

l_viewList

  

List of view names for which net voltages are to be set.

?netVoltages l_netVoltages

  

List of net names and corresponding minimum and maximum voltage values to be applied to the specified list of cellviews. The asterisk (*) is supported as a wildcard character.

Examples:

list("net15" 0.11 9.09)
list("net*" 0.11 1.09)

The ?netVoltages and ?voltageDateFile arguments are mutually exclusive.

?voltageDataFile t_voltageInfoFile

  

Name of a comma-separated value (CSV) file that contains voltage information, including net names and corresponding minimum and maximum voltage values. The asterisk (*) is supported as a wildcard character.

The ?netVoltages and ?voltageDateFile arguments are mutually exclusive.

?verbose { t | nil }

  

Enables verbose mode when generating labels based on a voltage information file. The software prints one message per entry in the file confirming the action taken for that entry.

The default is nil, which means that no messages are issued. When set to t, messages are printed in the CIW. Use ?logFile to save the messages to a separate log file.

?logFile t_logFile

  

Name of a log file in which messages are saved when generating labels from a voltage information file in verbose mode.

Value Returned

t

The specified net voltages were set in the cellviews given.

nil

The specified net voltages could not be set.

Examples

vdrSetNetVoltageRange(cv~>libName cv~>cellName list(list("layout" "r") list("layout_org" "r") ) ?netVoltages list("net*" 0.11 1.09))

Sets the specified minimum and maximum voltages on all the nets in the layout and layout_org views in the specified cell in read mode.

vdrSetNetVoltageRange(cv~>libName cv~>cellName list(list("layout" "r") list("layout_org" "r") ) ?netVoltages list("net15" 0.11 9.09))

Sets the specified minimum and maximum voltages on net15 in the layout and layout_org views in the specified cell in read mode.

The following example sets the minimum and maximum voltage values for the nets whose names start with VDD to 0.8 and 2.8, respectively.

cv=dbOpenCellViewByType(
      "vdr_demo"
      "inverter_chain"
      "layout"
      ""
      "r"
      )
;Opens the specified layout cellview in read-only mode.
cv~>nets~>name
;Prints names of nets available in the specified cellview.
vdd1=dbFindNetByName(
      cv
      "VDD1"
     )
;Retrieves the database ID of the net VDD1.
vdd2=dbFindNetByName(
      cv
      "VDD2"
     )
;Retrieves the database ID of the net VDD2.
vdd3=dbFindNetByName(
      cv
      "VDD3"
     )
;Retrieves the database ID of the net VDD3.
=> db:0x2c4ee21a
=>
=> ("VSS" "VDD1" "net15" "IN" "VDD2"
"net14" "VDD3" "OUT"
)
=> db:0x2c4e9a1b
=>db:0x2c4e9a1e
=> db:0x2c4e9a20
printf("The minimum and maximum voltage values for the net VDD1 is %L \n"
  dbGetNetVoltageRange(
        vdd1
       )
  )
;Prints the minimum and maximum voltage values currently set for the net VDD1.
=> The minimum and maximum voltage values for the net VDD1 is (1.5 1.5)
=> t
printf("The minimum and maximum voltage values for the net VDD2 is %L \n"
  dbGetNetVoltageRange(
        vdd2
       )
  )
;Prints the minimum and maximum voltage values currently set for the net VDD2.
=> The minimum and maximum voltage values for the net VDD2 is (2.5 2.5)
=> t
printf("The minimum and maximum voltage values for the net VDD3 is %L \n"
  dbGetNetVoltageRange(
        vdd3
       )
  )
;Prints the minimum and maximum voltage values currently set for the net VDD3.
=> The minimum and maximum voltage values for the net VDD3 is (3.5 3.5)
=> t
vdrSetNetVoltageRange(
      cv~>libName
      cv~>cellName
      list("layout" "r")
      ?netVoltages list("VDD*" 0.8 2.8)
     )
;Sets the minimum and maximum voltage values for all nets whose names start with VDD to 0.8 and 2.8, respectively.
=> t

To verify whether the minimum and maximum voltage values for the nets, VDD1, VDD2, and VDD3 have been set to 0.8 and 2.8, respectively, run the function dbGetNetVoltageRange again.

printf("The minimum and maximum voltage values for the net VDD1 is %L \n"
  dbGetNetVoltageRange(
        vdd1
       )
  )
=> The minimum and maximum voltage values for the net VDD1 is (0.8 2.8)
=> t
>
printf("The minimum and maximum voltage values for the net VDD2 is %L \n"
  dbGetNetVoltageRange(
        vdd2
       )
  )
=> The minimum and maximum voltage values for the net VDD2 is (0.8 2.8)
=> t
printf("The minimum and maximum voltage values for the net VDD3 is %L \n"
  dbGetNetVoltageRange(
        vdd3
       )
  )
=> The minimum and maximum voltage values for the net VDD2 is (0.8 2.8)
=> t    

Consider that you have a CSV file netVoltages.csv ,which contains information about nets and their minimum and maximum voltages. Contents of the CSV file are as follows:

#Net     minV     maxV
#All comments start with '#'     
#Top-level Nets     
net13,1,1.1
net17,1.2,1.3
IN,1.4,1.5
OUT,1.6,1.7
VSS,1.8,1.9
VDD1,2.0,2.1
VDD2,2.2,2.3
net14,2.4,2.5
net15,2.6,2.7
VDD3,2.8,2.9

The following example sets the minimum and maximum voltage values for the nets according to the information contained in the netVoltages.csv file.

vdrSetNetVoltageRange(
      cv~>libName
      cv~>cellName
      list("layout" "r")
      ?voltageDataFile "./netVoltages.csv"
      ?verbose t
     )
; Sets the minimum and maximum voltage values of the nets according to the values specified in the file netVoltages.csv. The netVoltages.csv file contains information about net names and their minimum and maximum voltages.
=>
INFO (VDR-2000): ./netVoltages.csv:5: Min/Max voltage values have been read for net 'net13'.
INFO (VDR-2000): ./netVoltages.csv:6: Min/Max voltage values have been read for net 'net17'.
INFO (VDR-2000): ./netVoltages.csv:7: Min/Max voltage values have been read for net 'IN'.
INFO (VDR-2000): ./netVoltages.csv:8: Min/Max voltage values have been read for net 'OUT'.
INFO (VDR-2000): ./netVoltages.csv:9: Min/Max voltage values have been read for net 'VSS'.
INFO (VDR-2000): ./netVoltages.csv:10: Min/Max voltage values have been read for net 'VDD1'.
INFO (VDR-2000): ./netVoltages.csv:11: Min/Max voltage values have been read for net 'VDD2'.
INFO (VDR-2000): ./netVoltages.csv:12: Min/Max voltage values have been read for net 'net14'.
INFO (VDR-2000): ./netVoltages.csv:13: Min/Max voltage values have been read for net 'net15'.
INFO (VDR-2000): ./netVoltages.csv:14: Min/Max voltage values have been read for net 'VDD3'.
=> t

To verify whether the minimum and maximum voltage values for the nets have been set according to the voltage information contained in the specified CSV file netVoltages.csv, run the function dbGetNetVoltageRange again.

printf("The minimum and maximum voltage values for the net VDD1 is %L \n"
  dbGetNetVoltageRange(
        vdd1
       )
  )
=> The minimum and maximum voltage values for the net VDD1 is (2.0 2.1)
=> t
printf("The minimum and maximum voltage values for the net VDD2 is %L \n"
  dbGetNetVoltageRange(
        vdd2
       )
  )
=> The minimum and maximum voltage values for the net VDD2 is (2.2 2.3)
=> t
printf("The minimum and maximum voltage values for the net VDD3 is %L \n"
  dbGetNetVoltageRange(
        vdd3
       )
  )
=> The minimum and maximum voltage values for the net VDD3 is (2.8 2.9)
=> t

Related Topics

Generating Voltage Labels from a Voltage Information File

vdrSetValidLayers

vdrSetValidLayers(
d_cellviewID
{ l_layers | nil }
)
=> t / nil

Description

Specifies a list of valid layers on which labels or markers can be generated. The software creates labels or markers only for nets on one of the listed layers. Each subsequent call to the function overrides all the previously set layers.

Arguments

d_cellviewID

Database ID of the cellview for which the valid layers are to be set.

l_layers | nil

List of valid layer names, each enclosed in double quotes and separated by a space.

Type nil to unset all previously registered layer names.

Value Returned

t

The specified list of layers has been successfully registered (or unset if you specified nil).

nil

An error occurred while registering the list of layers.

Example

cv = geGetEditCellView()
rValue = nil
if(cv then
    layers = list("Metal1" "Metal2" "Metal3" "Poly")
    rValue = vdrSetValidLayers(cv layers)
)

Registers Metal1, Metal2, Metal3, and Poly as valid layers for use in the voltage dependent rules flow. Labels or markers are created only for nets on those layers.

cv = geGetEditCellView()
rValue = nil
if(cv then
    layers = nil 
    rValue = vdrSetValidLayers(cv layers)
)

Removes the valid layers specification for the current cellview.

Related Topics

vdrGetValidLayers

vdrValidLayersList

Specifying Layers and Purposes for Generic Voltage Labels

vdrTransferVSyncConstraints

vdrTransferVSyncConstraints(
l_srcCellview
[ l_tgtCellviews ]
)
=>

Description

Transfers Voltage Synced Net (vsync) constraints from a specified source cellview to the specified target cellviews without opening any of the cellviews involved. If there is no target cellview specified, then the constraints are transferred to all open cellviews.

Arguments

l_srcCellview

The cellview containing the constraints to be transferred. For example:

list("lib1" "cell1" "schematic")

l_tgtCellviews

List of one or more cellviews to which the constraints are to be transferred. For example:

list(list("lib1" "cell1" "layout") list("lib2" "cell2" "layout_cv"))

Value Returned

None

Example

fromInfo =list("lib1" "cell1" "schematic")
toInfo = list(list("lib1" "cell1" "layout") list("lib2" "cell2" "layout_cv"))

tcv = dbOpenCellViewByType("lib1" "cell1" "layout" "" "r")
tgtCache = ciCacheGet(tcv);gives constraint cache of cellview
listOfCons = nil
foreach(elm tgtCache~>constraints
          when(elm~>type == 'voltageSyncedNets listOfCons = cons(elm listOfCons)))
printf("LOG: Constraints in target layout: %L\n" listOfCons~>name)
output => LOG: Constraints in target layout: nil

vdrTransferVSyncConstraints(fromInfo toInfo)

output => INFO (LX-1107): Started Layout XL for cellview 'lib1/cell1/layout'.
INFO (CMGR-6068): Updated 2 of 2 constraints
Successfully transferred Voltage Synced Nets Constraints to '2' target cellviews.

tgtCache = ciCacheGet(tcv);gives constraint cache of cell view
listOfCons = nil
foreach(elm tgtCache~>constraints
          when(elm~>type == 'voltageSyncedNets listOfCons = cons(elm listOfCons)))
printf("LOG: Constraints in target layout: %L\n" listOfCons~>name)
output => LOG: Constraints in target layout: ("Constr_2" "Constr_1")

Transfers voltage synced net constraints from source cellview lib1/cell1/schematic to target cellviews lib1/cell1/layout and lib2/cell2/layout_cv.

Related Topics

VSync Constraints Visualizer

Defining and Checking Voltage Synced Nets

vdrVsyncVisualizerGUI

vdrVsyncVisualizerGUI(
)
=> t / nil

Description

(ICADVM20.1 EXL Only) Opens the VDR Constraints Visualizer form, which you can use to create Voltage Synced Net (vsync) constraints from the contents of a CSV file, list the vsync constraints currently present in the layout view, and delete those that are no longer required.

Arguments

None

Value Returned

t

The form was opened.

nil

The form could not be opened.

Example

vdrVsyncVisualizerGUI()
t

Opens the VDR Constraints Visualizer form.

Related Topics

VSync Constraints Visualizer

Defining and Checking Voltage Synced Nets


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