13 

Flash Core Cell Models

This chapter describes the flash core cell macro models supported by the Virtuoso^® UltraSim^™ simulator. The simulator is able to model the floating gate effect of the flash core cell, in addition to conventional MOSFET models, such as MOS level 1 and BSIM3.

The flash core cell model is more accurate and flexible than conventional models using analog hardware description language (HDL) or complicated subcircuits comprised of many elements. The model also allows simultaneous simulation of the flash core cell with peripheral circuitry. Based on parameterized equations, the effects of the floating gate charge are tracked by the change of threshold voltage (Vth) of the cell. The flash core cell can model different events, such as programming, erasing, and reading during the simulation. Since each type of event is controlled by different physics, the Vth equations are different for each event.

Device

mcell nd ng ns npw [ndnw] model_name [l=length] [w=width] [deltvthinit=val] [delvto=val]

Description

The flash core cell is a MOSFET device with a floating gate. The Virtuoso UltraSim simulator supports single n-well and embedded p-well processes. A single n-well process results in a four pin device and an embedded p-well process results in a five pin device. The device parameters are listed in Table 13-1.

 

Table 13-1  Device Parameters 

Parameter	Description
mcell	MOSFET transistor for flash core cell
nd	Drain node
ng	Gate node
ns	Source node
npw	P-well node for n-MOSFET device
ndnw	Deep N-well node (optional)
model_name	Model name
l	Device length
w	Device width
deltvthinit or delvto	Device Vth shift at time 0 (default is 0 V)

Models

.model model_name flashcell flashlevel=val <parameter1=val1> <parameter2=val2>

Note: The flashcell keyword is used to indicate that the model card is a flash core cell model card. In addition, the flashlevel parameter can be set to 1, 2, or 3 according to the flash cell type being simulated (model parameters for different flash cell types are listed in Tables 13-2, 13-3, and 13-4).

Description

The Virtuoso UltraSim simulator supports flash core cell models based on MOS level 1 or BSIM3v3 models. The Vth of the transistor varies according to parameterized equations. The flash core cell model consists of two parts: The flash core cell model parameters used to model Vth changes and the conventional MOSFET model.

 

Table 13-2  Model Parameters for flashlevel=1 (NOR Type) 

Parameter	Description	Default Value
tpgmstep	Timestep at which Vth is adjusted for programming event during simulation	10 ns
tersstep	Timestep at which Vth is adjusted for erasing event	500 ns
kpgm	Change in Vth during programming event (per tpgmstep)	2e-3 V
kers	Change in Vth during erasing event (per tersstep)	0.15e-3 V
vgpgmmin	Minimum of Vgate during programming event	1 V
vdpgmmin	Minimum of Vdrain during programming event	1 V
vspgmmax	Maximum of Vsource during programming event	1 mV
vpwpgmmax	Maximum of Vpwell during programming event	0 V
vgersmax	Maximum of Vg during erasing event	0 V
vpwersmin	Minimum of Vpwell during erasing event	0 V
vdersmin	Minimum of Vdrain during erasing event Note: The vdersmin parameter is a required flash core cell model card parameter.	No default
vsersmin	Minimum of Vsource during erasing event	0 V
flashvcc	Flash core cell voltage supply	20 V
vthigh	Maximum of Vth	10 V
vtlow	Minimum of Vth	-10 V
vtpgmmaxshift	Absolute maximum Vth shift in a single programming event	10 V
vtersmaxshift	Absolute maximum Vth shift in a single erasing event	10 V

 

Table 13-3  Model Parameters for flashlevel=2 (NOR Type) 

Parameter	Description	Default Value
kpgm	Change in Vth during programming event (per tpgmstep)	2e-3 V
kers	Change in Vth during erasing event (per tersstep)	0.1e-3 V
tpgmstep	Time interval for Vth update during programming event	10 ns
tersstep	Time interval for Vth update during erasing event	500 ns
vgpgmmin	Minimum gate voltage to start programming event	1 V
vgpgmmax	Maximum gate voltage to start programming event	10 V
vdpgmmin	Minimum drain voltage to start programming event	1 V
vdpgmmax	Maximum drain voltage to start programming event	10 V
vpwpgmmin	Minimum pwell voltage to start programming event	-4 V
vpwpgmmax	Maximum pwell voltage to start programming event	0 V
vnwpgmmin	Minimum nwell voltage to start programming event	0 V
vnwpgmmax	Maximum nwell voltage to start programming event	20 V
vgersmin	Minimum gate voltage to start erasing event	-15 V
vgersmax	Maximum gate voltage to start erasing event	0 V
vdersmin	Minimum drain voltage to start erasing event	0 V
vsersmin	Minimum source voltage to start erasing event	0 V
vsersmax	Maximum source voltage to start erasing event	1 V
Vpwersmin	Minimum pwell voltage to start erasing event	0 V
vnwersmin	Minimum nwell voltage to start erasing event	3.5 V
vtpgmmaxshift	Maximum Vth shift during programming event	10 V
vtersmaxshift	Maximum Vth shift during erasing event	10 V
vthigh	Maximum value of Vth after programming event	10 V
vtlow	Maximum value of Vth after erasing event	-10 V

 

Table 13-4  Model Parameters for flashlevel=3 (NAND Type) 

Parameter	Description	Default Value
kpgm	Change in Vth during simulation programming event (per tpgmstep)	1V/1 us
kers	Change in Vth during erasing event (per tersstep)	1V/1 us
tpgmstep	Time interval for Vth update during programming event	10 ns
tersstep	Time interval for Vth update during erasing event	10 ns
vgspgmmin	Minimum gate to source voltage to start programming event	10 V
vgspgmmax	Maximum gate to source voltage for programming event	30 V
vsbpgmmax	Maximum source-to-body voltage to start program	0.5 V
vpwgersmin	Minimum pwell to gate voltage to start erasing event	10 V
vpwgersmax	Maximum pwell to gate voltage for erasing event	30 V
delvto	Initial value for cell Vth	0 V
vthigh	Maximum value of Vth after programming event	5 V
vtlow	Maximum value of Vth after erasing event	-5 V

Examples

The flash core cell model must be attached to the conventional MOSFET model in order to function. To attach a flash core cell model to a MOSFET model, use the following command:

.appendmodel flash=dest_mod_name model=src_mod_name

dest_mod_name is the name of the flash core cell model and src_mod_name is the name of the conventional MOSFET model.

For example

.model fnmos1 flashcell flashlevel=1 vthigh=10

tells the simulator that fnmos1 is a flash core cell model and that flashlevel and vthigh are its model parameters.

The next example

.model tn nmos level=49 vtho=0.0 k1=0.4 k2=0.3

.model nandcell flashcell flashlevel=3 vthigh=10 kpgm=2m vgspgmmin=10

.appendmodel flash=nandcell model=tn

mcell d g s pw tn l=0.9 w=1 delvto=-0.7

tells the Virtuoso UltraSim simulator that nandcell is a flash core cell model and tn is a conventional MOSFET model on which the flash core cell model is attached.