Parameter Binding

The parameters of analog and Spectre built-in primitives can be set only by name. For example, you can instantiate a resistor like this:

resistor #(.r(1K)) R1(pos,neg) ;

The formats used to set the parameters of some Spectre instantiations differ from the equivalent instantiations supported by the AMS Designer simulator. These differences are described in the following table:

Difference in Instantiation

Examples of Equivalent Spectre and Verilog-AMS Instantiations

Spectre-enumerated parameters are supported as strings in Verilog-AMS

// Spectre
V1 p n vsource type=dc ddc=5

// Verilog-AMS
vsource #(.type("dc"),.ddc(5))V1(p,n);

// Spectre N0 (in1 gnd in2 gnd) nport file="spiral.spdat" interp=splinerelerr=0.01 abserr=5e-4

// Verilog-AMS
nport #(.file("spiral.spdat"), .interp("spline"), .relerr(0.01),.abserr(5e-4)) N0 (.t1(in1), .b1(gnd), .t2(in2), .b2(gnd));

Automatically-sized parameter arrays are passed differently

// Spectre Filter in gnd out gnd svcvs poles=[1 0 5 0]

// Verilog-AMSsvcvs #(.poles({1,0,5,0})) Filter(in,ground,out,ground);

Parameter Binding

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