You can connect an instance of an analog primitive by linking the formal port name of the Spectre or SPICE master with the actual name declared in the instantiating module. For example, in the following instantiations 1 and 2 are the formal port names for the Spectre built-in primitive resistor and p and n are formal port names for the Spectre subcircuit my_subckt_cap.
resistor #(.r(100)) R1 (.1(src), .2(out));
my_subckt_cap #(.c(50n)) C1 (.p(out), .n(gnd));
The formal names of the ports for Spectre built-in primitives can be found in the "Component Statements" chapter of Spectre Circuit Simulator Reference manual.
The following capabilities apply to the port expressions of the instantiations of analog primitives when you are binding ports by name.
- Formal port names can appear in arbitrary order.
module top;
electrical n1,n2,n3;
mysub sub1(.p3(n1), .p1(n2), .p2(n3)); // Arbitrary order
endmodulesubckt mysub(p1 p2 p3)
...
ends mysub
- Master ports can be left unconnected. The unconnected ports are handled as unbound ports and are left as floating nodes.
module top;
electrical n1,n2,n3;
mysub sub1(.p2(n3)); // p1 and p3 are unconnectedend
modulesubckt mysub(p1 p2 p3)
...
ends mysub
- Port lists can be used for documentation only, if desired.
module top;
electrical n1,n2,n3;
mysub sub1(.p1(), .p2(), .p3()); // Used for documentation
endmodulesubckt mysub(p1 p2 p3)
...
ends mysub
- The formal name of a node is not allowed to appear more than once in an instantiation. If a formal name appears more than once, an error occurs during elaboration.
// Contains illegal code
module top;
electrical n1,n2,n3;
mysub sub1(.p1(n1), .p2(n2), .p2()); // This is an error
endmodulesubckt mysub(p1 p2 p3)
...
ends mysub
Binding Ports by Order
You can also connect an instance of an analog primitive by implicitly linking the formal port name of the Spectre or SPICE master with the actual name declared in the instantiating module. For example, the following instantiations omit the formal port names for the Spectre built-in primitive resistor and for the Spectre subcircuit my_subckt_cap but use the known ordering of those names to establish connections with the actual names used in the instantiating module.
resistor #(.r(100)) R1 (src, out);
my_subckt_cap #(.c(50n)) C1 (out, gnd);