You can instantiate analog primitives and subcircuits in your design. The supported analog primitives for the Spectre AMS Designer Simulator include SPICE and Spectre subcircuits and Verilog-A modules that you bring into the design using ahdl_include statements in the Spectre language. The AMS Designer simulator also automatically recognizes and supports all the Spectre built-in primitives except
a2ao
a2d
d2a
node
prst
In the AMS Designer simulator, the maximum number of ports that can be used for primitives with infinite ports, such as pvcvs, pvccs, and nport, is 30.
You can instantiate these analog primitives with ports that you bind either by name or by order. Ensure that you don't mix these two types of port bindings for a particular analog primitive instantiation and always bind the parameters of an instantiated analog primitive by name.
Determining the Discipline of Analog Primitive Ports
The elaborator assumes the discipline of an analog primitive port is always electrical , regardless of what you might actually have specified. This assumption affects the discipline resolution of nets attached to analog primitive ports.
The AMS Designer simulator does not support either port-discipline attributes or discipline resolution for analog primitives as described in the Verilog-AMS LRM 2.1.