SPICE Built-In Primitives in VHDL-AMS and VHDL-Digital

Cadence provides a methodology to instantiate SPICE primitives in VHDL-Digital and VHDL-AMS using the following methods:

• Component Instantiation of SPICE Primitives in VHDL-AMS
• Component Instantiation of SPICE Primitives in VHDL-Digital
• Direct Instantiation of SPICE Primitives in VHDL-AMS
• Instantiation of SPICE Primitives Through SPICE Models

Component Instantiation of SPICE Primitives in VHDL-AMS

Cadence provides a package file containing predefined VHDL components corresponding to some of the common SPICE primitives. This file is located at:

${CDS_INST_DIR}/tools/affirma_ams/etc/vhdlams_spice_primitives/cds_spice_primitives.vhms

You can use the appropriate component from this file to instantiate the SPICE primitives you need. If none of the predefined components suits your needs, you can define your own VHDL component to instantiate the SPICE primitive.

Generic cds_gm is hardcoded to be used for general SPICE parameters with the exception of real vectors.

If you want to instantiate a resistor in VHDL-AMS, you could define a component and instantiate the component as follows. The tool will verify that the component name resistor is a SPICE primitive and the instance r1 will be an instantiation of the SPICE primitive resistor.

If the name of the VHDL component defined does not match a SPICE primitive name, you can use the VHDL attribute cds_spice_builtin to rename the component, as shown in the following example. With this attribute, the instances of myresistor will become instantiations of the SPICE primitive resistor.

Component Instantiation of SPICE Primitives in VHDL-Digital

When VHDL digital signals connect to SPICE primitives, you need to create your own components for the SPICE primitives and instantiate the components. In this scenario, CEs will be required and need to be precompiled, which will be automatically inserted by the tool.

For example, if you want to instantiate a resistor in VHDL-Digital, you could define a component and instantiate the component as shown in the following example. The tool will insert the CE automatically for p1 and p2. The instance r1 will be an instantiation of the resistor SPICE primitive.

COMPONENT resistor IS
    GENERIC (r : real);
    PORT (SIGNAL x : out STD_LOGIC;
                  SIGNAL y : in STD_LOGIC);
END COMPONENT;
    SIGNAL p1, p2 : STD_LOGIC;
begin
    r1 : resistor GENERIC MAP (1000.0) PORT MAP (p1, p2);
ends;

Direct Instantiation of SPICE Primitives in VHDL-AMS

Direct instantiation of SPICE primitives is supported through the use of a Cadence-provided file that contains some predefined common skeletons for built-in primitives. This file is located at:

${CDS_INST_DIR}/tools/affirma_ams/etc/vhdlams_spice_primitives/cds_spice_primitives_entities.vhms

In the skeletons, parameters such as port type, generic type, name, etc. are hardcoded. The predefined file needs to be precompiled also. If none of the predefined skeletons in this file suit your requirement, use component instantiation.

Instantiation of SPICE Primitives through SPICE Models

You can instantiate SPICE models as SPICE built-in primitives by specifying the model file with MODELPATH option of the xrun command, as shown in the following example.

xrun -modelpath model.ckt .....

model.ckt:

simulator lang = spectre

model myresistor resistor r=1 l=2u w=2u

SPICE model instantiation:

component myresistor is -- model of resistor, defined in model.ckt

    port (terminal a, b : electrical);

end component;

r2 : myresistor port map (a, b);

You can also specify model files for an analog device using the include statement in the AMS control file.