The following table shows compatible mappings between Verilog-AMS disciplines and the predefined VHDL-AMS natures in the IEEE library and in the Cadence-provided VHDL-AMS variant of that library. The disciplines.vams file (that you normally include in your Verilog-AMS files) contains these discipline definitions. Using these mappings, you can connect Verilog-AMS components of one of the listed disciplines to a VHDL-AMS component of the corresponding nature.
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Verilog-AMS Discipline |
VHDL-AMS Nature |
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To create a mapping between a user-defined nature and a discipline, you can use the MAPN2D statement in your hdl.var file.
