Product Documentation
Spectre AMS Designer and Xcelium Simulator Mixed-Signal User Guide
Product Version 22.09, September 2022

Using xrun with Spectre and SPICE Input Files

The xrun utility's support of Spectre and SPICE input file is consistent with what Cadence's SPECTRE technology offers (which applies to the Spectre circuit simulators). This use model enables you to re-configure some of the digital blocks in your existing design with their SPICE equivalents. This allows you to switch seamlessly between digital verification and mixed-signal verification. amsspice is a Cadence AMS Designer internal executable that is used by xrun to process SPICE/analog blocks. When you specify a file with the extension .sp or .scs to the xrun command, it is automatically parsed and interpreted by amsspice.

If you use  -spice_ext   to change the extension to .cir or .ckt (for example), you must be sure to use the appropriate  simulator lang   assignments.

You need to specify the following information for AMSSPICE setup:

Your top-level analog file can contains SPICE subcircuit definitions, analog models, analog simulation control statements, anything you can put in an analog simulation control file, and the amsd block. You can put all your analog simulation control statements in a single file that you include in this top-level analog file so you do not need to use the -analogcontrol option. You can specify other Spectre commands in the input file as long as you do not specify them in the amsd block. Other Spectre commands (such as transient analysis command) must not appear in the amsd block.

For example:

run all_spice.scs anyOtherInputFiles...

where all_spice.scs contains the following:

// all_spice.scs

include "source/analog/PLL.sp" // analog subcircuit definitions 
include "analog_top.scs" // analog subcircuit definitions 
include "nmos1.scs" // nmos models 
include "pmos.scs"// pmos model 
include "acf.scs" // analog control file

//amsd block

amsd{

    portmap subckt=pll_top autobus=yes    config cell=pll_top use=spice    ie vsup=1.8

}


Following is an example of AMSD control file containing SPICE information (using the include statement) including models information and multiple amsd blocks specified in different files:

// file1.scs

    include "s1.cir"    include "s2.cir"

amsd{
    portmap subckt=s1 autobus=yes    config cell=s1 use=spice
}

amsd{
    portmap subckt=s2 busdelim=_    config cell=s2 use=spice     ie vsup=3.5
}

// file2.scs

include "subcx.sp"

amsd{
    portmap subckt=subcx    config cell=subcx use=spice
}

You can use the following methods to introduce SPICE models into Verilog-AMS:

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