Automatic Routing in an Area-Based Design Partition

In an area-based design partition, the scope of edit is defined in terms of area. When you perform routing inside an area-based design partition, you can route:

Fully between the pins that are inside the design partition.
Partially, if one pin is inside and the other pin is outside the design partition.

Different designers are expected to work in their respective areas. By default, Concurrent Layout sets edit mode to Only Select Inside Partition, which is a moderate level of restriction. The level of restriction varies with different edit modes in the following way:

Edit mode	Level of editing allowed	Description
Off	No restrictions	You can create and edit inside and outside the current design partition.
Only Select Inside Partition	Moderate	You can create objects outside the current design partition but cannot select any object outside your design partition.
Only Edit Inside Partition	Restrictive	You can create, select, and edit only inside the current design partition.

Interactive wire editing supports and respects the above edit modes.

The behavior of automatic routing also varies based on which edit mode is enabled in conjunction with Layout XL or Layout EXL tiers. You can use different settings to achieve intended results.

Edit mode	Layout XL	Layout EXL
Only Select Inside Partition	Routes freely outside the current design partition	Routes only between the pins that are inside the current design partition. Virtual or temporary pins are not generated. Automatic routing is done between the pins that are inside a design partition, but nets that cross the current design partition are not routed.
Only Edit Inside Partition	Routes freely outside current design partition	Routes only inside the current design partition for pins inside and outside design partition. Virtual pins are generated at the edge of the design partition for outside pins. These virtual pins are a placeholder for the remaining connection outside the design partition. You can achieve automatic routing to route partially if one pin is inside the current design partition and the other pin lies outside the design partition. Layout EXL is needed to enable the Congestion Analysis feature, which is used to analyze the full net connection irrespective of the source and location of the target pin and then generate virtual pins at the edge of the design partition for those nets which are crossing the design partition. Automatic routing is performed between the actual pin and virtual pins inside the design partition.

Edit mode

Layout XL

Layout EXL

Only Select Inside Partition

Routes freely outside the current design partition

Routes only between the pins that are inside the current design partition. Virtual or temporary pins are not generated.

Automatic routing is done between the pins that are inside a design partition, but nets that cross the current design partition are not routed.

Only Edit Inside Partition

Routes freely outside current design partition

Routes only inside the current design partition for pins inside and outside design partition.

Virtual pins are generated at the edge of the design partition for outside pins. These virtual pins are a placeholder for the remaining connection outside the design partition.

You can achieve automatic routing to route partially if one pin is inside the current design partition and the other pin lies outside the design partition.

Layout EXL is needed to enable the Congestion Analysis feature, which is used to analyze the full net connection irrespective of the source and location of the target pin and then generate virtual pins at the edge of the design partition for those nets which are crossing the design partition. Automatic routing is performed between the actual pin and virtual pins inside the design partition.

Virtuoso Concurrent Layout User Guide
Product Version IC23.1, November 2023