Custom cells

none

A cell without any cell type definition.

Soft cells

blockBlackBox

BLOCK BLACKBOX

A block that sometimes only contains a size statement that estimates its total area. The block can optionally contain pins. This cell type does not have any sub-block implementation available.

softMacro

BLOCK SOFT

A block that contains a version of the sub-block that is not fully implemented. Certain parts of the block can still be modified, such as the aspect ratio or pin locations, because the sub-block is not yet fully implemented.

Hard cells

block

BLOCK

A predefined cell used in a hierarchical design.

blockRing

RING

A large cell that has an internal power mesh and only exposes power-pin shapes that form a ring along the cell boundary. It can also be used for power-switch cells that are abutted together to form a power-ring around a power-domain.

cover

COVER

A cell with data that is fixed to the floorplan and cannot change, such as power routing (ring pins) around the core.

Core cells

core

CORE

A standard cell used in the core area. The cell must contain a site definition so that standard cell placers can correctly align the cell to the standard cell rows.

coreSpacer

CORE SPACER

A cell in the core area used to fill in space between regular core cells.

coreAntenna

CORE ANTENNACELL

A cell in the core area used for solving process antenna violations. It has a single input to a diode to bleed off charge that builds up during manufacturing.

coreFeedThru

CORE FEEDTHRU

A cell in the core area used for connecting to another cell.

coreTieHigh

CORE TIEHIGH

A cell in the core area used for connecting unused I/O terminals to the power bus.

coreTieLow

CORE TIELOW

A cell in the core area used for connecting unused I/O terminals to the ground bus. 

coreWellTap

CORE WELLTAP

A standard cell in the core area that connects N and P diffusion wells to the correct power or ground wire. The cell provides a tap for the N and P wells to the power or ground wires.

coreSpacerEndCapPre

ENDCAP PRE

A cell placed at the left end of core rows to connect to power wiring.

coreSpacerEndCapPost

ENDCAP POST

A cell placed at the right end of core rows to connect to power wiring.

Bump cells

coverBump

COVER BUMP

A physical-only cell that has bump geometries and pins. Typically, a bump cell has geometries only on the top-most bump metal layer, although it might contain a via and pin to the metal layer below.

I/O cells

pad

PAD

An I/O pad cell.

padInput

PAD INPUT

An input pad cell for I/O rows and I/O corner pads.

padOutput

PAD OUTPUT

An output pad cell for I/O rows and I/O corner pads.

padInOut

PAD INOUT

An I/O pad cell for I/O rows and I/O corner pads.

padPower

PAD POWER

A power pad cell for I/O rows and I/O corner pads.

padSpacer

PAD SPACER

An I/O pad cell for I/O rows. Unlike a core spacer cell, a pad spacer cell can contain logic pins.

padAreaIO

PAD AREAIO

An area I/O driver cell that does not have the bump built in as part of the cell, and therefore requires routing to a cover bump cell for connection to the IC package.

cornerTopLeft

ENDCAP TOPLEFT

A top-left I/O corner cell.

cornerTopRight

ENDCAP TOPRIGHT

A top-right I/O corner cell.

cornerBottomLeft

ENDCAP BOTTOMLEFT

A bottom-left I/O corner cell.

cornerBottomRight

ENDCAP BOTTOMRIGHT

A bottom-right I/O corner cell.