Product Documentation
Virtuoso Power Manager User Guide
Product Version IC23.1, June 2023

Design Sub-Block Modeling During Top-Level 1801 Design Model Extraction

The modeling information of hierarchical design blocks can be provided to digital verification tools, such as Conformal Low Power (CLP) as follows:

Related Topics

Exporting Power Intent of a Design

Registering Libraries

Special Cell and Standard Cell Modeling

Reference Libraries or Cells

MLDB Libraries


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