6
Exporting Power Intent of a Design
The power intent of the design specified in the 1801 file acts as a design source along with the logical intent (synthesized Verilog netlist). This collection of source input files is utilized by different tools, including the formal verification tools. The 1801 information is expected to successively refine at various design stages, one of which is the case where the design information changes (ECO). Here, a 1801 file incorporating all the design changes is required to be regenerated to have a logical equivalence with the updated design schematic.
The export flow enables you to extract the design connectivity from the schematic and export the low power design intent to a 1801 file. This helps in adding the updated content in incremental stages of IP authoring, which can finally be verified for correctness using CLP along with a VerilogPG netlist.
Related Topics
Extracting the Power Intent from a Design
Special Isolation Cells in Liberty Power Model Export
Return to top