LAM File Logical Section

<LOGICAL>
  <LIB NAME="libName" >
    <CELL NAME="cellName" >
      <VIEW NAME="viewName" >
        <MFACTOR_SPLIT>t | nil</MFACTOR_SPLIT>
        <SFACTOR_SPLIT>t | nil</SFACTOR_SPLIT>
        <REMOVE_DEVICE>expression</REMOVE_DEVICE>
        <STOP_LIST>list_of_viewNames</STOP_LIST>
        <VIEW_LIST>list_of_viewNames</VIEW_LIST>
        <PARAMETERS>
          <INCLUDE>
            <CHECK>list_of_parameterNames</CHECK>
          </INCLUDE>
          <IGNORE>
            <GEN>list_of_paramNames</GEN>
            <CHECK>list_of_paramNames</CHECK>
          </IGNORE>
        </PARAMETERS>
        <TERMINALS>
          <IGNORE>
            <GEN>list_of_termNames</GEN>
            <CHECK>list_of_termNames</CHECK>
          </IGNORE>
        </TERMINALS>
      </VIEW>
    </CELL>
  </LIB>
</LOGICAL>

Description

Specifies for each cellview in the logical design the view list that was used to find the cellview in the hierarchy, the stop list that will be used to find the corresponding physical view, and options that specify whether the device in question is to be generated or ignored in the physical view.

Statements

Statement	Description
`<LIB NAME="`libName`" >`
	Specifies the logical library name and encloses all the statements relating to that library. The name must be enclosed in quotation marks.
`<CELL NAME="`cellName`" >`
	Specifies the logical cell name and encloses all the settings relating to that cell. The name must be enclosed in quotation marks.
`<VIEW NAME="`viewName`" >`
	Specifies the logical view name and encloses all the settings relating to that cellview. The name must be enclosed in quotation marks.
`<MFACTOR_SPLIT>t \| nil</MFACTOR_SPLIT>`
	Controls whether Layout XL generates logical devices with the mfactor Property property as multiple devices in the physical view. GUI: Split mfactored devices
`<SFACTOR_SPLIT>t \| nil</SFACTOR_SPLIT>`
	Controls whether Layout XL generates logical devices with the sfactor Property property as multiple devices in the physical view. GUI: Split sfactored devices
`<REMOVE_DEVICE>`expression`</REMOVE_DEVICE>`
	Causes parasitic devices to be ignored by merging nets connected to the terminals of a single instance. For example, to short terminals `PLUS` and `MINUS` on a resistor, type the following. <REMOVE_DEVICE>(short(PLUS MINUS))</REMOVE_DEVICE> Do not enclose the expression in quotation marks. GUI: Remove device
`<STOP_LIST>`list_of_viewNames`</STOP_LIST>`
	Lists the view names to be used to determine the corresponding physical view for a given logical view. When traversing a hierarchy, Configure Physical Hierarchy stops when it encounters a view with one of the specified names. Separate each name with a single whitespace. Do not enclose the list in quotation marks. GUI: Physical stop view list
`<VIEW_LIST>`list_of_viewNames`</VIEW_LIST>`
	Specifies the view names used to descend into a hierarchical design to find logical views. Separate each name with a single whitespace. Do not enclose the list in quotation marks. GUI: Logical switch view list
`<PARAMETERS>`
	Encloses the `<INCLUDE>` and `<IGNORE>` statements that specify which logical instance parameters are to be checked or which are the ones to be ignored for generation and check. If the `<INCLUDE>` statements are specified, these are given precedence over the `<IGNORE>` statements. GUI: Options on the Parameters tab
`<TERMINALS>`
	Encloses the `<IGNORE>` statements that specify which logical instance terminals are to be ignored for generation and check. GUI: Options on the Terminals tab
`<IGNORE>`
	Encloses the `<GEN>` and `<CHECK>` statements that specify which logical instance parameters (or terminals) are to be ignored for generation or check. The `ignore` parameter is also used by the dummy instance backannotation commands to determine which parameters are to be ignored for backannotation. For more information, see Dummy Instances Backannotation.
`<GEN>`list_of_names`</GEN>`
	Lists the logical instance parameters (or terminals) that are ignored by the following commands; Generate All From Source, Generate Selected From Source, Generate Clones, Check Against Source, Update Components And Nets, Update Layout Parameters, Update Schematic Parameters. Separate each name with a single whitespace. Do not enclose the list in quotation marks. GUI: Ignore for generation
`<CHECK>`list_of_names`</CHECK>`
	Lists the logical instance parameters (or terminals) that are ignored by the Check Against Source command. Mismatches for any of the listed parameters are not reported by the check. The list inherits all the parameter names from the Ignore for generation list. Separate each name with a single whitespace. Do not enclose the list in quotation marks. GUI: Ignore for check

Example 1

<LOGICAL>
  <LIB NAME="basic" >
    <CELL NAME="cellA" >
      <VIEW NAME="symbol" >
        <REMOVE_DEVICE>(short(src dst))</REMOVE_DEVICE>
      </VIEW>
    </CELL>
  </LIB>
  <LIB NAME="lib1" >
    <CELL NAME="cellB" >
      <VIEW NAME="symbol" >
        <MFACTOR_SPLIT>t</MFACTOR_SPLIT>
        <REMOVE_DEVICE>(short(PLUS MINUS) funcR(r))</REMOVE_DEVICE>
        <STOP_LIST>abstract layout layoutS</STOP_LIST>
        <VIEW_LIST>schematic symbol layout compacted</VIEW_LIST>
        <PARAMETERS>
          <IGNORE>
            <GEN>w l</GEN>
            <CHECK>a b</CHECK>
          </IGNORE>
        </PARAMETERS>
      </VIEW>
    </CELL>
  </LIB>
</LOGICAL>

In the example above,

For cellview	LAM specifies that
`basic/cellA/symbol`	The cellview is to be ignored by merging the nets connected to its terminals `src` and `dst`.
`lib1/cellB/symbol`	Multiple physical devices are to be generated for mfactored instances of this cellview.
	The cellview is to be ignored by merging the nets connected to terminals `PLUS` and `MINUS` but only if the function funcR(r) returns a value that is non-nil.
	The view to be used to generate the physical equivalent of this device is either `abstract`, `layout`, or `layoutS`.
	The `w` and `l` parameters are to be ignored during generation and that the `a` and `b` parameters are to be ignored during check.

Example 2

<PHYSICAL>

    <MAPPINGS>

      <LIB NAME="hierarchy" >

        <CELL NAME="inv" >

          <VIEW NAME="layout" >

            <LOGICAL_CELL>

              <LIB NAME="hierarchy" >

                <CELL NAME="inv" >

                  <VIEW NAME="symbol" >

                    <VLGEN>t</VLGEN>

                    <VPLGEN>t</VPLGEN>

                    <PARAMETERS>

                      <VPL>pl 1;pw 1;nl 1;nw 1</VPL>   #VPLGEN parameters and their default values

                    </PARAMETERS>

                  </VIEW>

                </CELL>

              </LIB>

            </LOGICAL_CELL>

          </VIEW>

        </CELL>

        <CELL NAME="nand2" >

          <VIEW NAME="layout" >

            <LOGICAL_CELL>

              <LIB NAME="hierarchy" >

                <CELL NAME="nand2" >

                  <VIEW NAME="symbol" >

                    <VLGEN>t</VLGEN>

                  </VIEW>

                </CELL>

              </LIB>

            </LOGICAL_CELL>

          </VIEW>

        </CELL>

      </LIB>

    </MAPPINGS>

</PHYSICAL>

The LAM file above specifies the schematic cells that need to be generated as VPLGens or VLGens.

When generating VPLGens, the following additional parameters can be specified:

<VPL>pl;pw;nl;nw</VPL>

If the default value is a CDF parameter for the symbol, you can choose not to mention the default value. The specified value for a VPLGen or VLGen parameter can be of type: float, boolean, or a string.

Example 3

<PHYSICAL>

    <MAPPINGS>

      <LIB NAME="hierarchy" >

        <CELL NAME="inv" >

          <VIEW NAME="layout" >

            <LOGICAL_CELL>

              <LIB NAME="hierarchy" >

                <CELL NAME="inv" >

                  <VIEW NAME="symbol" >

                    <VLGEN>t</VLGEN>

                    <VPLGEN>t</VPLGEN>

                    <PARAMETERS>

                      <VPL>pl 1;pw 1;nl 1;nw 1</VPL>   #VPLGEN parameters and their default values

                    </PARAMETERS>

                  </VIEW>

                </CELL>

              </LIB>

            </LOGICAL_CELL>

          </VIEW>

        </CELL>

        <CELL NAME="nand2" >

          <VIEW NAME="layout" >

            <LOGICAL_CELL>

              <LIB NAME="hierarchy" >

                <CELL NAME="nand2" >

                  <VIEW NAME="symbol" >

                    <VLGEN>t</VLGEN>

                  </VIEW>

                </CELL>

              </LIB>

            </LOGICAL_CELL>

          </VIEW>

        </CELL>

      </LIB>

    </MAPPINGS>

</PHYSICAL>

The LAM file above specifies the schematic cells that need to be generated as VPLGens or VLGens.

When generating VPLGens, the following additional parameters can be specified:

<VPL>pl;pw;nl;nw</VPL>

Virtuoso Layout Suite XL: Connectivity Driven Editing User Guide
Product Version IC23.1, November 2023