FDSOI Connectivity Stack
An FDSOI (Fully Depleted Silicon-On-Insulator) connectivity stack is formed when a thin, fully depleted Si channel (SOI) and the diffusion (RX) are insulated from the substrate and wells by a buried oxide (box), as shown in the figure below.
The HYBRID layer defines the area where SOI and box are removed such that the diffusion directly connects to the substrate or wells, as shown in the figure above. The wells are laterally insulated by shallow trench isolation (STI), as shown in the figure above.
Therefore, the HYBRID layer is defined as a cut layer. viaDefs, as displayed below, are added to the technology file to define that RX can be connected to the well and substrate only through the HYBRID layer. In the example below, RX is an n-implanted diffusion (ndiff) and BP is a p-implant (pplus).
Therefore, the FDSOI connectivity stack can be represented as:
M1 -> CA -> RX
(RX & BP) -> HYBRID -> substrate
RX -> HYBRID -> NWELL
The corresponding layer function table can be represented as:
For routing purposes, the physical via definitions, as defined below, are M1_sub and M1_NW,.
You must set up the validVias constraint in the extractor constraint group, as displayed below, such that the extractor excludes the physical viaDefs M1_sub and M1_NW.
("virtuosoDefaultExtractorSetup" nil
interconnect(
(validLayers (... M1 CA PC RX BP HYBRID NWELL) )
( validVias (... M1_PC M1_RX RX_sub RX_NW) )
)
)
Similarly, you must set the validVias constraint in the wire editing constraint group, as displayed below, to exclude the viaDefs: M1_RX, RX_sub, and RX_NW.
M1_RX, RX_sub, and RX_NW are not physical viaDefs. These are added in the technology file only to properly define the connectivity stack for the connectivity extractor.
("virtuosoDefaultSetup" nil
interconnect(
(validLayers (... M1 PC) )
( validVias (... M1_PC M1_sub M1_NW) )
)
)
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