Troubleshoot Layout Generation Problems

You can face following issues during layout generation:

• Issues when pPar and Callbacks are Used in a Design when Generating a Layout
• Issues when Generating Selected Components From Source
• Cannot see Generate Selected From Source Command in Hierarchical Designs

Issues when pPar and Callbacks are Used in a Design when Generating a Layout

If a design using pPar() and callbacks is generating an incorrect Pcell layout, it is likely that one of the following requirements is not being met:

1. Shell environment variable CDS_Netlisting_Mode set to Analog

2. CDF parameter parseAsCEL set to yes

But, if a design is generating an incorrect layout inspite of both the conditions above met, then, it might be an underlying issue with the use of pPar() with callbacks that is preventing the layout from generating correctly. Cadence recommends avoiding the using of pPar() with callbacks. It is recommended that derived parameters be computed at the Pcell level. But, this may need a change in the PDK, which may not always be feasible. In such cases, manually triggering the callbacks by setting the lxEvalCDFCallbacks environment variable to t can help.

Issues when Generating Selected Components From Source

If the Generate Selected From Source command fails, check that:

• The instance is not already placed in the layout.
  If it is already placed, you cannot use Generate Selected From Source to generate it again.
• All the required masters and reference views are present, including
  • The default layout master for the specified schematic component.
  • Any layout master specified by the useCell attribute for the schematic instance or master.
  • The required layout view as derived from the stopList.

Cannot see Generate Selected From Source Command in Hierarchical Designs

If you push into a hierarchical schematic view beyond the layout stop point, you cannot use the Generate Selected From Source command to generate lower-level instances inside that top-level cell.

For example, assume there is a layout view derived from the specified stopList corresponding to a cell1 instantiated in the schematic. If you descend into an instance of cell1 and try to generate the lower-level instances, the command fails.

Implicit Inherited Connection Terminals to Local Nets Not Created

Generate Selected From Source does not create pins for implicit inherited connections to local nets (i.e., wires with netSet properties that do not have a ! in the name).

Related Topics

lxEvalCDFCallbacks

Layout Generation

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