Product Documentation
Real Number Modeling Guide
Product Version 22.09, September 2022

Connection to the Digital Domain

When there is a connection between the discrete (logic and wreal) and continuous, such as electrical and mechanical domain, the tool automatically inserts connect modules. It also applies to the connection between two discrete domains, such as wreal to logic connection. The connect modules (CM) are called L2R (Logic-to-Real) and R2L (Real-to-Logic), These connect modules are inserted automatically, if needed, during the elaboration process.

The following is an example of a basic logic to real (L2R) connect module:

connectmodule L2R(Rout, Lin);
   input Lin;
   output  Rout; wreal Rout;  

   parameter real vsup = 1.8 from (0:inf);  // nominal supply voltage
   parameter real vlo = 0;                  // logic low vlotage
   parameter real vhi = vlo+vsup from (vlo:vlo+vsup];   // logic high voltage

   real L_conv;
   initial
     begin
               /* set the initial value to Z */
        L_conv = `wrealZState;
     end

   // Determine the value of L and convert to a real value
   always
     begin
          case (Lin)
            1'b0:
              L_conv = vlo;
            1'b1:
              L_conv = vhi;
            1'bz:
              L_conv = `wrealZState;
            1'bx:
              L_conv = `wrealXState;
            default:
              L_conv = `wrealXState;
          endcase // case(L_code)    

        @(Lin);
     end  

   // drive the converted value back onto the output R pin
   assign Rout = L_conv;
  endmodule

The following is an example of the R2L connect module:

connectmodule R2L(Rin, Lout);
   output Lout;
   input  Rin; wreal Rin;

   parameter real vsup = 1.8 from (0:inf);      // nominal supply voltage
   parameter real vlo = 0;                      // logic low voltage
   parameter real vhi = vlo+vsup from (vlo:vlo+vsup];   // logic high voltage
   parameter real vtlo = vsup / 3;              // lower threshold
   parameter real vthi = vsup /1.5;             // upper threshold

   reg           R_conv;

   initial
     begin
               /* set the initial value to Z */
        R_conv = 1'bz;
     end 

   // Determine the value of R and convert to a logic value
   always
     begin
        if(Rin >= vthi)
                 R_conv = 1'b1;
        else if (Rin <= vtlo)
          R_conv = 1'b0;
        else if(Rin === `wrealZState)
          R_conv = 1'bz;
        else
          R_conv = 1'bx;
        @(Rin);
     end  

   // drive the converted value back onto the output L pin
   assign Lout = R_conv;
endmodule




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