The concept of disciplines was introduced in the Verilog-AMS language to differentiate different domains within discrete and continuous design parts. For example, disciplines are used to separate different power domains, such as a 3.3 V logic and a 1.8 V logic region. The same applies for the continuous domain. While the systems of equations for electrical and mechanical descriptions are identical for the simulation, the disciplines are used to apply different settings like access functions to both design parts.
Elaborator and simulation functions are influenced by the discipline settings. Also, the connect modules to be used are also controlled by the discipline.