Save Dynamic Abstract Generation Options Form
Use the Save Dynamic Abstract Generation Options form to specify the advanced abstraction rules.
The form contains the following tabs.
General
The following table describes the fields available on the General tab of the Save Dynamic Abstract Generation Options form.
| Field | Description |
|---|---|
|
Specifies the text labels that you want to map from the layout view to be created as pins in the layout dual view. This field is case-sensitive. The syntax for specifying the text labels is as follows:
An example of this is as follows:
In this example, the text labels on layer Instead of specifying a layer purpose pair, if you specify only the layer name, ‘all’ purposes for the specified layer are considered during Dynamic Abstract Generation. See Text Labels-to-Pins Mapping. |
|
|
Specifies a list of names for power pin. Specifying the pin names enables you to distinguish the pin types in the design. You can specify a list of pin names in the form of regular expressions, with each pin name separated by a space. See Regular Expressions for Creating Pin Names. |
|
|
Specifies a list of names for ground pin. Specifying the pin names enables you to distinguish the pin types in the design. |
|
|
Specifies a list of names for clock pin. Specifying the pin names enables you to distinguish the pin types in the design. |
|
|
Specifies a list of names for analog pin. Specifying the pin names enables you to distinguish the pin types in the design. |
|
|
Specifies a list of names for output pin. Specifying the pin names enables you to distinguish the pin types in the design. |
|
|
Specifies the hierarchy depth which is the number of levels in the design hierarchy the Dynamic Abstract Generation process must search for metal shapes that lie underneath a text label. The default value is |
|
|
Retains the text labels from the layout view in the layout dual view. |
|
|
Specifies a list of layers or layer purpose pairs to be used to define the prBoundary. The boundary is drawn so that it encloses all the geometries found on the specified layers or layer purpose pairs. The syntax for specifying the layers is as follows: LPP1 LPP2 An example of this is as follows. metal1 (metal2 drawing) In this example, all geometries on layer metal1 for all purposes and on layer metal2 for drawing purpose are enclosed by prBoundary. |
|
|
Specifies a list of layer purpose pairs on which you want to define a spacing constraint along with the spacing value. For example, you can specify ( absSetOption( "AbstractBlockageUserDefinedSpacing" "(MET1 0.75) (MET2 0.3)") |
Extraction
The following table describes the fields available on the Extraction tab.
| Field | Description |
|---|---|
|
This section lets you specify the options for extracting signal nets. |
|
|
Runs connectivity extraction on signal nets. By default, the Extract Signal Net check box is deselected. |
|
|
Specifies the layers or layer purpose pairs on which signal net extraction is to be performed. |
|
|
Specifies the layers that you want to be considered as weak layers. When extracting signal nets, you can set certain layers as weak layers and instruct the extractor to extract through these as well. The weakly connected pins will be created for the layers specified in the Weak Layers field. By default, the Weak Layers field is empty. |
|
|
Specifies the layers on which you want the pins to be created. This can be a subset of layers that are specified in the Extract Layers field. |
|
|
Specifies how many levels down the instance hierarchy the Dynamic Abstract Generation process must search for the shapes to be extracted. The default value is |
|
|
Establishes a must-join relationship between all disjoint groups of geometries extracted from separate pins on the same net. |
|
|
Specifies a list of terminal names, each separated by a space. If the extractor finds a terminal name that matches one of the specified terminal names, and if there are disjoint geometries from different pins on the net after extraction, a |
|
|
Specifies the connectivity between layers. This enables you to specify the layer connectivity without having to add via definitions in the technology file. The default value of this field is based on the connectivity derived from analyzing the vias in the technology file. The format for specifying a value in this field is to list the layers as shown below.
In the example above, a triple layer entry means that layer1 connects to layer2 through the via layer layer3. A pair means that the first layer, layer7, connects to the second layer, layer8, by overlap (for example, local interconnect to polysilicon). See Restrictions for Signal and Power Pin Geometry. |
|
|
This section lets you specify the options for extracting power nets. |
|
|
Runs connectivity extraction for power nets. If this check box is selected, all the pin shapes created during the Pins step are extracted. By default, the Extract Power Nets check box is deselected. |
|
|
Specifies the layers or layer purpose pairs through which you want the power nets to be extracted. |
|
|
Specifies the layers on which you want the pins to be created. Creating pins on a layer helps to determine the shapes found by the extractor that are converted into pins. |
|
|
Specifies how many levels down the instance hierarchy the Dynamic Abstract Generation process must search for the shapes to be extracted. The default value is |
Antenna
The following table describes the fields available on the Antenna tab.
Related Topics
Specifying Advanced Dynamic Abstraction Rules
Return to top