Product Documentation
Virtuoso Abstract Generator User Guide
Product Version IC23.1, November 2023

Save Dynamic Abstract Generation Options Form

Use the Save Dynamic Abstract Generation Options form to specify the advanced abstraction rules.

The form contains the following tabs.

Tab Description

General

Lets you specify the pin, PR boundary and blockage settings.

Extraction

Lets you specify the extraction information for signal and power nets

Antenna

Lets you create process antenna data for Pcells. By default, all the check boxes on this tab are deselected.

General

The following table describes the fields available on the General tab of the Save Dynamic Abstract Generation Options form.

Field Description

Map Text Labels to Pins field

Specifies the text labels that you want to map from the layout view to be created as pins in the layout dual view. This field is case-sensitive. The syntax for specifying the text labels is as follows:

(textLPP1 geomLPP1 geomLPP2)
(textLPP2 geomLPP3 geomLPP4)

where,

  • The syntax of textLPP is (textLayer textPurpose) or textLayer.
  • The syntax of geomLPP is (geomLayer geomPurpose) or geomLayer.

An example of this is as follows:

(textLayer (metal1 drawing) (metal2 drawing))

In this example, the text labels on layer textLayer for all purposes are mapped first to the shapes on layer metal1 with purpose drawing, and then to shapes on layer purpose pair metal2 drawing.

Instead of specifying a layer purpose pair, if you specify only the layer name, ‘all’ purposes for the specified layer are considered during Dynamic Abstract Generation. See Text Labels-to-Pins Mapping.

Power Pin Names

Specifies a list of names for power pin. Specifying the pin names enables you to distinguish the pin types in the design. You can specify a list of pin names in the form of regular expressions, with each pin name separated by a space. See Regular Expressions for Creating Pin Names.

Ground Pin Names

Specifies a list of names for ground pin. Specifying the pin names enables you to distinguish the pin types in the design.

Clock Pin Names

Specifies a list of names for clock pin. Specifying the pin names enables you to distinguish the pin types in the design.

Analog Pin Names

Specifies a list of names for analog pin. Specifying the pin names enables you to distinguish the pin types in the design.

Output Pin Names

Specifies a list of names for output pin. Specifying the pin names enables you to distinguish the pin types in the design.

Geometry Search Depth

Specifies the hierarchy depth which is the number of levels in the design hierarchy the Dynamic Abstract Generation process must search for metal shapes that lie underneath a text label. The default value is 20. You can control how far down the design hierarchy does Abstract Generator search for text labels during text-to-pin mapping.

Preserve text labels

Retains the text labels from the layout view in the layout dual view.

Using geometry on layers

Specifies a list of layers or layer purpose pairs to be used to define the prBoundary. The boundary is drawn so that it encloses all the geometries found on the specified layers or layer purpose pairs. The syntax for specifying the layers is as follows:

LPP1 LPP2

An example of this is as follows.

metal1 (metal2 drawing)

In this example, all geometries on layer metal1 for all purposes and on layer metal2 for drawing purpose are enclosed by prBoundary.

Blockage Spacing Constraint

Specifies a list of layer purpose pairs on which you want to define a spacing constraint along with the spacing value. For example, you can specify (METAL1 0.75) (METAL2 0.3). If you do not specify the value for the spacing constraint, than the default spacing value is the minSpacing value that is defined in the technology file for that particular layer. You can also specify the blockage spacing constraint in the Dynamic Abstract Generation options file as follows.

absSetOption( "AbstractBlockageUserDefinedSpacing" "(MET1 0.75) (MET2 0.3)")

Extraction

The following table describes the fields available on the Extraction tab.

Field Description

Signal Extraction

This section lets you specify the options for extracting signal nets.

Extract Signal Nets

Runs connectivity extraction on signal nets. By default, the Extract Signal Net check box is deselected.

Extract Layers

Specifies the layers or layer purpose pairs on which signal net extraction is to be performed.

Weak Layers

Specifies the layers that you want to be considered as weak layers. When extracting signal nets, you can set certain layers as weak layers and instruct the extractor to extract through these as well. The weakly connected pins will be created for the layers specified in the Weak Layers field. By default, the Weak Layers field is empty.

Pin Layers

Specifies the layers on which you want the pins to be created. This can be a subset of layers that are specified in the Extract Layers field.

Extraction Depth

Specifies how many levels down the instance hierarchy the Dynamic Abstract Generation process must search for the shapes to be extracted. The default value is 32, which is the maximum number of levels in a design hierarchy stored in the database.

Extract Must Join Terms

Establishes a must-join relationship between all disjoint groups of geometries extracted from separate pins on the same net.

Must Join Term

Specifies a list of terminal names, each separated by a space. If the extractor finds a terminal name that matches one of the specified terminal names, and if there are disjoint geometries from different pins on the net after extraction, a MUSTJOIN relationship is created for that terminal.

Layer connectivity

Specifies the connectivity between layers. This enables you to specify the layer connectivity without having to add via definitions in the technology file. The default value of this field is based on the connectivity derived from analyzing the vias in the technology file.

The format for specifying a value in this field is to list the layers as shown below.


(layer1 layer2 layer3) (layer4 layer5 layer6) ... (layer7 layer8) ...

In the example above, a triple layer entry means that layer1 connects to layer2 through the via layer layer3. A pair means that the first layer, layer7, connects to the second layer, layer8, by overlap (for example, local interconnect to polysilicon). See Restrictions for Signal and Power Pin Geometry.

Power Extraction

This section lets you specify the options for extracting power nets.

Extract Power Nets

Runs connectivity extraction for power nets. If this check box is selected, all the pin shapes created during the Pins step are extracted. By default, the Extract Power Nets check box is deselected.

Extract Layers

Specifies the layers or layer purpose pairs through which you want the power nets to be extracted.

Pin Layers

Specifies the layers on which you want the pins to be created. Creating pins on a layer helps to determine the shapes found by the extractor that are converted into pins.

Extraction Depth

Specifies how many levels down the instance hierarchy the Dynamic Abstract Generation process must search for the shapes to be extracted. The default value is 32, which is the maximum number of levels in a design hierarchy stored in the database.

Antenna

The following table describes the fields available on the Antenna tab.

Field Description

Hierarchical Antenna, Antenna for Input Pin, Antenna for Output Pin, Antenna for In-Out Pin, Extract Metal Area, Extract Metal Side Area

Specifies that Dynamic Abstract Generation computes the process antenna data for a given layer by using the following options on the Antenna tab.

  • Hierarchical Antenna
  • Antenna for Input Pin
  • Antenna for Output Pin
  • Antenna for In-Out Pin
  • Extract Metal Area
  • Extract Metal Side Area

Diffusion Layers

Extracts diffusion layers specified in the technology file.

Antenna Layers

Specifies the layers for which you want to calculate their process antenna data.

Define Gate Area, Define Drain Area

Specifies the layer-geometry specification for defining the gate and drain geometry regions, respectively. An example that defines the gate area region is as follows:

(poly and fiff)

An example that defines the drain region area is as follows:

(diff andnot poly)

Define Oxide Number

Selects the oxide model to be extracted for a particular diffusion layer. The list contains four oxide types: Oxide1, Oxide2, Oxide3, and Oxide4. You can apply a unique oxide model for up to four diffusion layers.

Related Topics

Specifying Advanced Dynamic Abstraction Rules


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