CE Information in VHDL-SPICE

In AMS Designer simulator, you can use the elaborator option -cereport to generate a report with information about the final set of CEs inserted in a VHDL-SPICE design.

Only the CEs specified in the AMS control block ce card are identified and reported by this option. The report contains the following information about the CEs:

• CE serial number
• Name of the CE (complete name containing library entity and architecture)
• VHDL file name from where the CE is picked up
• Hierarchical name of the CE instance
• Generic map used for the ce instance
• VHDL-Digital signal type and the spice cell or port name associated with the CE

The report also clearly distinguishes between the optimized CEs and the CEs that are not optimized.

In addition to -cereport , you can use the following elaborator options to generate specific CE information:

• -ceverbose - To generate detailed VHDL-SPICE CE report for debugging the issues related to CE insertions. In addition to the information provided by the -cereport option, the -ceverbose option reports the following.
  • Information about the digital drivers for L2E
• • Information about the digital load for E2L
• • Back-to-back information for an L2E, when the L2E driver is an E2L CE
• • Information about the drivers and loads for digital BIDIR input
• -ceprobes - To generate a Tcl file, ceprobes.tcl , with the probes for CE verification

• -cedriversload- To generate a Tcl file,cedriversloads.tcl, with the drivers and loads for the CE

  The -ceprobes and -cedriversload options only work in conjunction with the -cereport or -ceverbose option. They automatically enforce -cereport if none of -cereport or -ceverbose is explicitly specified.

Related Topic

• VHDL-SPICE Conversion Element Optimization