Verilog-AMS–Based RNM for Wreals

The Verilog-AMS based real number modeling (RNM) solution facilitates high performance and reasonably accurate modeling of analog behavior to aid verification of mixed-signal designs. You can use the Verilog-AMS based RNM functionality to write:

• SystemVerilog-compliant RNMs using disciplineless wreal nettypes (discrete time domain)

• Portable Verilog-AMS wreal models for use in SystemVerilog (SV)

This capability enables you to reuse your code according to the changes to the SV modeling features.

Related Topics

• Writing RNMs Using Disciplineless Wreal Nets
• Writing Portable Verilog-AMS Wreal Models for Use in SV
• SystemVerilog Real Number Modeling