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Preface

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This manual assumes that you are familiar with the development and design of integrated circuits. It contains task-related information about the Dracula^® standalone verification tool.

Dracula is an integrated system that offers a full tool suite to meet most verification needs.

• Design Rules Check (DRC) to ensure the chip is processed correctly
• Layout Versus Schematic (LVS) and Electrical Rules Check (ERC) to ensure the chip is electrically correct
• Layout Parameter Extraction (LPE) and Parasitic Resistance Extraction (PRE) parasitic data that is output to simulators to ensure the chip performs to specifications
• DracToRCX interface to allow Dracula users the ability to run parasitic extraction through the Assura RCX tool
• Mask generation for accuracy

These tools work from the same database to ensure a smooth transition through each phase of IC verification.

This preface discusses the following:

• Related Documents
• Typographic and Syntax Conventions

Related Documents

For more information about Dracula and other related products, you can consult the sources listed below.

• The Cadence Installation Guide tells you how to install the product.
• The Dracula Standalone Verification Reference Manual gives complete reference information on the Dracula suite of tools and functions.

Typographic and Syntax Conventions

This list describes the syntax conventions used in this book.

LITERAL	UPPERCASE words indicate keywords that you must enter literally. These keywords represent function or option names.
argument	Words in italics indicate user-defined arguments for which you must substitute a name or a value.
...	Three dots (...) indicate that you can repeat the previous argument.
; <functions omitted>	When you see this notation in a rules file listing, it means that lines have been omitted from the rules file. The complete rules files are not included in examples. Only the functions needed to demonstrate a specific rule are listed.

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