Product Documentation
Virtuoso Floorplanner User Guide
Product Version IC23.1, November 2023

Pin Placement Form

Use the Pin Placement form to place and optimize pins your design.

This form consists of two tabs:

Tab Description

Pin Planner tab

Specifies how pins are to be placed in the design.

The pin figure entries are expressed as termName:pinName:figName. If a pin has more than two pin figures attached to it, but the pin figures have the same name, they are represented by a single entry in the pin table. The constraints generated by Pin Planner use the termName:pinName:figName convention, thus enabling the constraints system to distinguish between pin figures in constraints from pins.

This format is used only when the pin has more than one figure. If a pin has only one figure then the termName:pinName format is used when creating the constraint.

Pin Optimization tab

Lets you to position pins to obtain the shortest possible net length.

Pin Planner tab

The following table describes the fields available on the Pin Planner tab of the Pin Placement form.

Field Description

Edit

This section lets you specify the scope for running the Pin Planner.

Top Level Pins

Applies the form settings only to the top-level pins in the design.

Level-1 Pins

Applies the form settings to pins of the selected soft block in the design. Select the required soft block from the drop-down list.

If you have already selected a block in the canvas, that block is automatically selected in the Pin Planner tab. If you have more than one block selected in the canvas, the first block you selected is the one selected in the form.

Auto-Switch to Level-1

Zooms to the selected soft block automatically and switches to Level-1 Pins mode when you click a soft block in the design canvas. This option is off by default, which means that when you click a soft block, the soft block is selected, but you remain at the top level.

Filter

This section filters the pins listed in the form. Use a combination of the two pull-downs to filter the pins that are displayed. Alternatively, you can use the By Name field to filter the pins by name.

Edge

Filters pins based on the edge to which they are assigned. The available edge options are All, Left, Top, Right, Bottom, Level-1 pin, Top-Level Route, To Hard Block Multi Pin, and Hard Block Multi Pin.

Status or Type

Filters pins based on their placement status or pin types. The available options are All, Placed, Unplaced, Locked, Fixed, Ordered, Unordered, I, O, and IO.

By Name

Filters pins based on their names. The default regular expression for this filter is “.*” (dot asterisk), which implies that a name filter is not applied. Therefore, all the pins in the design are displayed. Other supported regular expressions are:

  • “ ” (Blank): Is equivalent to the default regular expression and it implies that the name filter is not being applied. Displays all the pins.
  • in.*”: Displays all the pins that have names starting with “in”.
  • “.*in.*”: Displays all the pins that contain “in” in their name.
  • “.*in: Displays all the pins that have names ending in “in”.
    • The “in” in the valid regular expressions can be replaced with any other expression, such as “VDD”.
    • The filter string “*.*” is not a valid regular expression. Use a valid regular expression instead.
    • The By Name field is case-sensitive.

Pin table

Lists all the shape pins found in the current scope. It does not list pins that are vias. The entries are expressed as termName:pinName:figName because the pin figure is the physical entity that you are placing. If a pin has more than two pin figures attached to it, but the pin figures have the same name, they are represented by a single entry in the pin table.

The other columns in the pin table are the Edge to which the pin is assigned, the Order in which the pins are placed, and the Status, Type, Layer, Width, Height, and Connectivity of the pins.

You can sort the table by any column by clicking the relevant column header. Click again to reverse the sort order.

The Connectivity column annotates whether pins are connected to buried pins or multiple hard block pins.

Message

Provides a hint about your next action.

Attributes

This section specifies the pin attributes of the pins in the pin table.

Edge

Specifies the edge on which the selected pins are to be placed. The options are Left, Top, Right, Bottom, Level-1 pin, Top-Level Route, To Buried Pin, Level-1 Route, To Hard Block Multi Pin, Any, and As is. The As is setting allows the edge settings of pins to remain intact when changing the Order or Placement Status Constraint properties.

Depending on the block type, the pin edges are snapped to either the manufacturing grid or the routing grid. If the block type is custom, the pin edges are snapped to the manufacturing grid. If the block type is digital, the pin edges are snapped to the routing grid.

Order

Specifies the order in which the selected pins are to be placed. You can specify an order only if you have assigned the pins to an edge.

To place the pins unordered, leave the field blank or type “-”. To specify an order for the pins, enter a value.

Placement Status Constraint

Specifies the status to be assigned to the pins after they are placed.

  • Lock at Placed Location: Places pins at an appropriate locations on the boundary and then locks them at that location. A locked pin cannot be moved either by the automatic placement functions or manually by the user.
  • Fix at Placed Location: Places pins at the appropriate location on the boundary and fixes them at that location. A fixed pin cannot be moved by the automatic placement functions, but can be moved manually, for example, using the Edit – Move command.
  • No Constraint (Floating): Specifies that the selected pins will neither be locked nor fixed after they are placed. A no constraint, floating pin can be moved freely by the automatic placement functions and by using manual editing functions.
  • As is: Does not change the status of the selected pins after placement. Use this option to preserve differing status settings on the selected pins.

Shape

This section specifies the pin shape attributes.

Layer

Specifies the layer on which the pin shapes are to be drawn. Layer purpose names are filtered dynamically as you type a value in the Layer field. By default, the width, height, and layer of the pin selected in the pin table is displayed. When you change the layer, Pin Planner checks whether the pin width and height values are valid. These values cannot be lesser than the layer minwidth. Therefore, when you select a different layer, if the pin width and height values retrieved are equal to or greater than the layer minwidth, the values are displayed in the form. If the pin width and height values are less than the layer minwidth, the layer minwidth value is displayed in the corresponding field.

Width

Specifies the width of the pin shape to be generated.

Height

Specifies the height of the pin shape to be generated.

Re-Place Pins

Specifies which pins are to be updated with the new attributes when you click Apply.

  • All Edges: Specifies that pins on all edges can be moved by the placer.
  • Selected Edge: Specifies that only the pins assigned to the selected edge can be moved. All other pins are fixed in their current position.
  • Selected Pins: Specifies that only the selected pins can be moved by the placer when you click Apply. All other pins are fixed in their current position.

Apply

Applies the specified pin attributes to the selected pins.

Pin Spacing

This section lets you specify how the selected pins are to be spaced.

Spacing values are enforced only between adjacent pins on an edge, even if the spacing is set between two non-adjacent pins. If you specify a spacing between a pin and an iterated pin, the software applies the spacing between the last pin of the iterated pin and the individual pin. If the specified spacing cannot be satisfied, you see a warning in the CIW and the pins are not moved.

Pins are spaced and constraints are updated only by clicking one of the Space buttons in this section and not by clicking the Apply button in the Attributes section of the Placement Planning form.

Value

Specifies the distance by which the selected pins are to be spaced.

Spacing type

Specifies how the spacing value is to be applied.

  • center-center: Applies the spacing value to the center lines of each of the pin shapes to be spaced.
  • edge-edge: Applies the spacing value to the edges of the each of the pin shapes to be spaced.

Update Constraints

Updates the constraints that are applicable to the design automatically (for example, alignment constraints on the selected pins) based on the settings in the Pin Spacing section. If a pin to be spaced has the alignment constraint set, the placer reads the constraint to determine the appropriate access direction for the pin.

Space from LEFT/BOTTOM pin

Spaces out reference pin from the leftmost pin on the top and bottom edges (0 in the example) and the bottom pin on the side edges (C).

Environment variable: pinSpacingFrom

Space from CENTER pin

Spaces out the center pins on all edges as reference. On the left edge in the example above, this is pin B. On the top edge, the pin spacer divides the total number of pins by 2 and uses the result as the reference pin (2).

Space from RIGHT/TOP pin

Spaces out the rightmost pin on the top and bottom edges (3) and the top pin on the side edges (A).

Place As In

This section provides the following options:

  • Schematic: Places pins in the same relative positions as in the schematic view.
  • Symbol: Places pins in the same relative positions as in the schematic view.

Iterated Pins

Specifies the way iterated pins are to be listed.

Interleave

Interleaves bits of the selected iterated pins by applying an order constraint that specifies how the individual bits are to be placed.

Uninterleave

Reverses the interleaving of the selected iterated pin bits.

Expand

Shows all individual bits of iterated pins.

Collapse

Shows bus notations for iterated pins.

All

Performs the Expand or Collapse function on all the pins in the list box.

Selected

Performs the Expand or Collapse function only on the selected pins.

Change Order

Lets you change the order of pins in the pins table.

Arrow left/down

Moves the selected pins down in the ordered list.

Arrow right/up

Moves the selected pins up in the ordered list.

Swap order

Inverts the order of two selected pins in the list.

Create

Lets you create horizontal and vertical rail pins.

VRail

Elongates the selected pins vertically from the top edge of the boundary to the bottom.

HRail

Elongates the selected pins horizontally from the left edge of the boundary to the right.

Zoom

This section lets you zoom the display to the currently-selected pins.

Zoom ON

Enables the zoom functionality. Drag the slider active to set the desired zoom level. The acceptable zoom range is between 0 and 4. Level 0 provides the minimum zoom and level 4 provides the maximum zoom.

Alternatively, set the environment variable vpaAutoZoomEnable, to enable auto zoom when you open the layout view. To set the desired zoom level, you can use the environment variable, vpaAutoZoomLevel.

If you set the auto zoom level to a value less than 0 when using the vpaAutoZoomLevel environment variable, the minimum zoom level will automatically default to 0. If you set a maximum value higher than 4 using the environment variable, the maximum zoom value will automatically default to 4. The zoom range lies between 0 to 4 irrespective of the method you use to set the zoom level.

Pin Optimization tab

The following table describes the fields available on the Pin Optimization tab of the Pin Placement form.

Field Description

Mode

Specifies the pins to be optimized.

  • All: Optimizes all pins in the design.
  • Selected: Optimizes only the selected pins. In this mode, you can select High Effort to get better results.
  • High Effort: In the Selected mode, the High Effort option is available. With this option selected, Pin Optimizer runs extra iterations to get better results (better than normal run). Pin Optimizer checks all available slots to achieve the least possible net length. However, these improvements are limited to the pins placed on parallel edges.

Environment variables: pinOptMode, selectedOnly

Pin Spacing

This section specifies the minimum spacing between the pins.

The specified spacing value may be ignored when there are connected pins on the same net, but in different blocks. If the PR boundaries of the blocks are abutted, then the pins would also be abutted, without considering any potential DRC spacing violations.

See Specifying Pin Spacing for Pin Optimization.

Use Table Spacing

Scales up the spacing values as per the table spacing rules defined for different widths of the pins. If this option is turned off, then use the minimum spacing values that are defined for the layers in the technology file.

Environment Variable: tableSpacingRule

Auto

Indicates that the minimum spacing values are to be based on the line-line spacing mode. If the Use Table Spacing check box is selected, then the spacing values are defined as per the table spacing rules for different pin widths.

Environment Variable: spacingMode

Custom

Enables the Options and Advanced Options buttons.

Environment variable: customPinGrid

Options

Displays the Pin Spacing Options form, which lets you specify the pin spacing values for each layer.

Advanced Options

Displays the Pin Spacing Advanced Options Form.

Pin Offset

This section specifies the distance between the adjacent side and the center point of the first pin. Pin offset defines the first valid point for placing a pin on a grid. Pin offset values are layer aware, which means that each layer can have a different pin offset value.

See Specifying Pin Offset for Pin Optimization.

Auto

Places the first pin on a grid such that it is aligned to the corner pins of the adjacent side and that there is no spacing violation.

This is the default mode. Pin Optimizer also ensures that there is no wastage of grid space. In this mode, Pin Optimizer respects both, the pin spacing value and the pin pitch from the instance corners.

The Options button is not available in this mode

Custom

Provides options to control the pin offset values for all layers in a design. Custom offset number is the value from the boundary edge to the first pin slot to which the pin needs to be centered. In this mode, Pin Optimizer respects the pin pitch values from instance corners, independent of offset mode. However, Pin Optimizer does not respect the pin spacing from instance corners, but ensures that pins do not lie outside the instance boundaries.

When you select Custom, Options is made available.

Adding a pin grid adjustment factor for custom pins may be error-prone as the distance from the boundary edge to pin edge may not be the value used to adjust the offset.

Environment variables: offSetByGrids, offSetBySpacing, offSetMode

Options

Displays the Pin Offset Options form, which provides options to specify the pin offset values for all layers in the design.

Target Pin Side

Specifies the Side of the block or the top-level PR boundary on which pins are to be placed. The valid values are: Left, Right, Top, and Bottom.

Environment variable: targetPinSide

Left, Right, Top, and Bottom.

Specifies that a check box is available for each side on which pins can be placed. In the image below, each check box shows the definition of that side for rectangular and rectilinear blocks. For rectilinear blocks, the Target Pin Side setting specifies the access direction for pins.

The Target Pin Side settings are considered after considering the constraints specified in the Constraint Manager.

Pin Optimizer treats the edge of any soft block or top-level block as a range. Pin Optimizer places pins at different points of the range to find the best location so that minimum net length is achieved.

Pin layer/side constraints

Provides options to switch the pin layer depending on the side of the block on which the pin is placed by Pin Optimizer.

See Setting Pin Layer and Side Constraints for Pin Optimization.

Environment variables: enablePinLayerSideConstraints, bottomSidePinLayersConstraints, leftSidePinLayersConstraints, rightSidePinLayersConstraints, topSidePinLayersConstraints

Match Fixed Pins Layer/Size

The options in this section are applicable only to nets with fixed (non-movable) pins connected to movable pins.

A pin is considered fixed if:

  • The pin is not selected for pin optimization. This is applicable when Mode is set to Selected and the pins on one side of a net are selected. The selected pins are movable, while pins on the other side of the net are fixed.
  • The placement status of the pin is set to fixed or locked.

When Mode is set to All, pins on both side of nets are selected for optimization. Therefore, there are no reference (fixed) pins, and so the Match Fixed Pins Layer/Size settings are not applicable. To honor these settings, you must manually change the placement status of the required pins to fixed or locked.

Match Pin Layer

Provides options to change the layer and purpose of the 'to be placed' pins to match the layer and purpose of the connected fixed pins. For example, if a movable pin is on (Metal2 drawing) layer purpose and the connected fixed pin is on (Metal1 drawing) layer purpose, then selecting this option will change the movable pin layer to (Metal1 drawing).

Match Pin Size

Changes the size of the movable pins to that of the connected fixed pins, select the Match Pin Size check box. For example if the target pin size is 0.6 x 0.6 and the reference pin size is 1.0 x 1.0, then selecting this option will change the target pin size to 0.6 x 0.6.

Match Pin Size is available only when you select Match Pin Layer.

Place Rectangular Pin

Specifies the pin edge to be abutted to the PR boundary. It is applicable only to rectangular pins.The valid values are: As Is, Short Edge, and Long Edge.

Environment variable: rectangularPinEdgeOnPRB

As Is

Abuts the rectangular pin as-is to the PR boundary, irrespective of whether the abutted edge is short or long during pin optimization. Depending on the original position of the pin and the PR boundary side, either the long edge or the short edge of the pin is abutted to the PR boundary.

Short Edge

Abuts the short edge of the rectangular pin to the PR boundary during pin optimization.

Long Edge

Abuts the long edge of the rectangular pin to the PR boundary during pin optimization.

Honor Current Pin Location

Snaps pins (selected or all) to their nearest WSP tracks by moving them by a minimum distance from their current position.

The following constraints set on the pins are honored:

  • Wire Type
  • Width
  • Side/Edge
  • Order
  • minSpacing violations in blockages and pre-placed pins

Choose Honor Current Pin Location in the following situations:

  • When optimizing unconnected pins leads to issues such as bunching of pins. Unconnected pins are pins with either no connectivity, or they are connected to instances that are located or placed outside the PR boundary. To avoid such bunching issues, choose Select Honor Current Pin Location. The pins are only snapped to their nearest WSP tracks, while honoring any applicable pin constraints.
  • When pins are placed after performing design placement using placement tools such as Pin Planner, Virtuoso Custom Digital Placer, and Virtuoso Analog Placer. The pins are snapped to their nearest tracks, while honoring any applicable pin constraints.
When Honor Current Pin Location is selected, Pin Optimizer does not try to achieve the minimum net length.

Environment variable: honorCurrentPinLocation

Congestion Aware

Runs Pin Optimizer in congestion-aware mode.

See Congestion-Aware Pin Placement in Pin Optimizer.

Environment variable: enableCongestion

Optimize

Runs Pin Optimizer.

Related Topics

Planning Placement of Top-Level and Level-1 Pins

Pin Optimization


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