Top-Level Power Structures Pushed into Block Level

During floorplanning, you often need to push the top-level implementation of power structures to the block level. Floorplanner provides the Push Into Blocks command that enables you to do this.

The Push Into Blocks command can be used for pushing only orthogonal paths, routes, and path segments to the block level.

If the Power - Ground Net(s) option is selected in the Push Into Blocks form, then the supported objects can be pushed only if the nets corresponding to these objects have the ‘ground’ or ‘power’ signal types. However, if the Regular (non-Power/Ground) Net(s) option is selected, then the supported objects can be pushed only if the nets corresponding to these objects have the signal types, such as ‘tieHi’, ‘tieLow’, ‘clock’, and ‘signal’. In addition, the supported shape objects should be on the layers for which the layer function in the technology file is defined as ‘metal’. The Push Into Blocks command pushes the top-level power structures down to one level only.

Depending on whether the soft block instance is fed by the top-level net to which the objects are attached to, the Push Into Blocks command pushes the top-level power structures to the block level as-is or as routing blockages. If the soft block instance is fed by the same top-level net, the net geometry (associated vias and supported shape objects) are pushed as they are. In this case, square pins are created at the intersection of the net geometry and the PR boundary. These pins are created inside the PR boundary.

If the soft block is not fed by the same top-level net, the power structures are pushed as routing blockages.

Power geometries that are close (within the maximum of the minSpacing value) to the PR boundary, but are placed outside the PR boundary, are pushed as routing blockages. Vias that have connectivity with routes are pushed as three routing blockages.

Stand-alone vias that do not have connectivity with any route or path or pathSeg are not pushed into blocks.

The following table summarizes the behavior.

Soft block behavior	Net geometry overlap	Net geometry behavior
Soft block is fed by the top-level net of any signal type	The net geometry completely overlaps the soft block instance boundary	Overlapping portion of the net geometry is removed from the top level. The net geometry is pushed as-is to the block and two square pins are created at the intersection of the net geometry and the PR boundary.
	The net geometry partially overlaps the soft block instance boundary	The net geometries are retained at the top level. The net geometries are pushed as they are to the block and two pins are created at the intersection of the net geometry and the PR boundary.
	The net geometry is close (within the maximum of the minSpacing value) to the PR boundary, but is placed outside the PR boundary	The net geometries are retained at the top-level. The net geometries are pushed as routing blockages. Each via is pushed as three routing blockages.
Soft block is not fed by the top-level net of any signal type	The net geometry completely or partially overlaps the soft block instance boundary	The net geometries are retained at the top level. The net geometries are pushed as routing blockages. In case of a via, three routing blockages are created.
	The net geometry is close (within the maximum of the minSpacing value) to the PR boundary, but is placed outside the PR boundary	The net geometries are retained at the top-level. The net geometries are pushed as routing blockage. Each via is pushed as three routing blockages.

The following figure shows the net geometry completely overlaps the soft block instance boundary.

The following figure shows the net geometry partially overlaps the soft block instance boundary.

The following figure shows the net geometry completely or partially overlaps the soft block instance boundary

Virtuoso Floorplanner User Guide
Product Version IC23.1, November 2023