vhdlRegisterSimulator

vhdlRegisterSimulator(
[ parserCallBack ]
[ analyzerCallBack ]
[ analyzerFileExt ]
[ elaboratorCallBack ] 
[ simulatorCallBack ]
[ dataDirCallBack ]
[ dataFileCallBack ]
[ workLibCallBack ]
)
=> t / nil

Description

To register your callbacks, add the procedures for the callbacks in some file, say myfile.il that is in the /home/xyz directory and add the following lines to the .cdsinit file in your home directory:

(loadi "/home/xyz/myfile.il")

To use non-Cadence VHDL tools, you need to define your own SKILL procedures and register this information with the toolbox using the SKILL routine, vhdlRegisterSimulator().

If you do not provide your own callback routines to invoke any of the non-Cadence tools, namely, the parser/analyser/elaborator/simulator, then by default, XM-VHDL tools such as the parser/analyzer xmvhdl, elaborator xmelab, and simulator xmsim are run.

Arguments

parserCallBack	Takes the VHDL source file and the name of the library in which this file is contained and runs the parser on it.
analyzerCallBack	Invokes the analyzer that analyzes the specified sourceFileName which exists in the specified directory filePath.
analyzerFileExt	A string representing the name of the analyzed file.
elaboratorCallBack	Invokes the elaborator to elaborate the VHDL design unit.
simulatorCallBack	Invokes the simulator that simulates the specified simulation model.
dataDirCallBack	Given the library, cell, and view name, this procedure returns the physical directory where the VHDL text file is to be stored.
dataFileCallBack	Given the library, cell, and view names, this procedure returns the physical file name under which the VHDL text file is to be stored.
workLibCallBack	Returns the library that contains the compiled design unit information.

Value Returned

t	The command is successful.
nil	The command is unsuccessful.

Examples

Related Topics

vhdlHiImport

vhdlImport

vhdlPinListToVHDL

vhdlToPinList

Verilog In and VHDL In Import Functions

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