Toolbar Options

This section explains the toolbar options to create vias.

Creates vias in the entire cellview.

Creates vias in a rectangular area, polygon area, or the entire visible area. Select the Use entire overlap to use the entire overlapped area for creating vias.

Creates vias at the analyzed places.

Connectivity

This section provides options to create vias for a selected set of nets, exclude selected nets, and exclude power and ground nets.

The choices for this field are On same net, Ignored.

Nets

Specifies the net to be used when creating vias.

Environment Variable: viaAutoViaOnSelectedNets

Exclude Nets

Excludes the specified nets when creating vias.

Environment Variable: viaAutoViaExcludeNetsName

Exclude power/ground

Excludes the power and ground nets when creating vias.

Environment Variable: viaAutoViaExcludePowerAndGroundNets

Constraint Overrides

This section specifies constraint override options.

Show All

Displays the constraint override options.

Environment Variable: viaShowAllConstraintOverride

Min Num Cuts

Specifies the minimum number of cuts to be automatically created for overlapping areas between shapes.

Environment Variable: viaOverrideMinNumCutsConstraint, viaAutoViaMinNumCuts

Alignment

Specifies the alignment of vias using the alignment choices Auto, Top left, Top center, Top right, Center left, Center center, Center right, Bottom left, Bottom center, Bottom right, Edge align, Two edge align, or Two edge align center. The default is Auto .

Environment Variable: viaOverrideAlignmentConstraint, viaAutoViaAlignment

Cut Class Orient

Specifies the preferred orientation for the cut class. The choices are Auto, Horizontal, Vertical, or Same-orientation.

Environment Variable: viaOverrideCutClassOrientConstraint, viaCutClassOrientation

Cut Array Dir

Specifies the preferred direction for the cut box as Auto, Horizontal, or Vertical. The default is Auto.

Enclosure Dir

Specifies the preferred enclosure direction for the via engine in auto mode as XY, Wire, Min area, Horizontal, or Vertical.

Environment Variable: viaOverrideCutArrayDirConstraint, viaAutoViaCutArrayDirection

Place via on centerline

Specifies whether the via is placed on the centerline.

Environment Variable: viaOverrideOffCenterViaConstraint, viaPreventOffCenterVia

Add Metal

Adds a metal layer to the via.

Environment Variable: viaOverrideAddMetalConstraint, viaEnableAddMetal

Maximize cut

Lets you get a bigger cut size at the cost of more added metal outside the overlap.

Environment Variable: viaOverrideMaximizeCutsConstraint, viaMaximizeCuts

Extend to orthogonal wire

Extends vias to the width of the crossed wire.

Optimization

This section provides options to optimize the via creation process.

DRC check

Prevents the creation of a via if it introduces DRC violations with it’s neighboring shapes. If this option is not selected, the via is created even if it introduces DRC violations with it’s neighboring shapes.

Environment Variable: viaEnableDRCCheck

Try with smaller cut classes

Places a via with a smaller cut class if a larger via is not DRC aware.

Environment Variable: viaTryWithSmallerCutClass

Attempt to use bridge vias

Places a bridge via according to the topology. If the bridge via is invalid, a basic via is created.

Environment Variable: viaAttemptToUseBridgeVias

Fix DRC on overlap shapes

Prevents the creation of a via if it introduces DRC violations on the overlap. If this option is not selected, the via is created even if it introduces DRC violations on the overlap.

Environment Variable: viaFixOverlapShapeViolations

Processing

Species the processing options to be used during via analysis. The choices are Distribute on multi CPU, or Single CPU.

Environment Variable: viaMultiProcessMode

Max Num CPUs

Specifies the number of CPUs to be used during via analysis.

Environment Variable: viaMultiProcessNumCPU

Annotations

This section provides options to create annotations displayed in the Auto Via tab of the Annotation Browser.

Enable

Enables annotations when creating vias.

Environment Variable: viaEnableAnnotation

Vias adding metal

Creates annotations on vias that add metal to the design.

Environment Variable: viaAnnotateViasWithAddedMetal

Vias not adding metal

Creates annotations on vias that do not add metal to the design.

Environment Variable: viaAnnotateViasWithNoAddedMetal

Vias not retained

Creates annotations on overlaps on which vias have not been created because they add a metal or create DRC violations.

Environment Variable: viaAnnotateViasNotRetained

Overlaps with no solution

Creates annotations on overlaps for which no via is generated.

Environment Variable: viaAnnotateOverlapsWithNoValidSolution

More Options

This section provides options to specify the maximum stack depth and creating vias in group.

Max Stack Depth

Searches the overlap with the same number of transitions or less than the specified number. You can specify the value of the maximum stack depth.

Environment Variable: viaMaxStackDepth

Create in Group

Specifies whether the via is created in a group. The choices are None, New figGroup, Virtual_0.

Environment Variable: viaCreateInGroup